A Hardware Software Co Integration Approach For Securing Network Infrastructure Using Reconfigurable Computing
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A Hardware Software Co Integration Approach For Securing Network Infrastructure Using Reconfigurable Computing
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Author : Wafi Danesh
language : en
Publisher:
Release Date : 2022
A Hardware Software Co Integration Approach For Securing Network Infrastructure Using Reconfigurable Computing written by Wafi Danesh and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2022 with Computer networks categories.
In the last two decades, there has been a rapid proliferation of connected devices spanning various application domains. Coupled with the rise of novel computer networking paradigms, such as Internet-of-Things (IoT), edge computing, fog computing, cloud computing among others, experts predicted an estimated 50 billion connected devices by the year 2020. The emergence of these networking paradigms, however, raises critical security vulnerabilities. Such vulnerabilities, as a result, exposes new attack vectors to exploitation by increasingly competent attackers, with ever more sophisticated means at their disposal, at both the software and hardware level. The key reasons for the existence of such vulnerabilities in modern computer networks, arise due to the multifaceted constraints that need to be incorporated. Many current networking applications work under operating conditions of severe cost, power, and resource constraints. As a consequence of these constraints, the requisite computational resources required to incorporate critical security countermeasures are significantly reduced. Developers and system designers for the varied modern computer networking systems are often forced into a tradeoff of conventional security features, such as encryption, authentication, access control, network, and access security. At the software level, these vulnerabilities manifest in the form of unforeseen network intrusions, such as zero-day attacks. At the hardware level, a very serious threat are hardware Trojans (HT), which are clandestine, malicious circuits that can be inserted during runtime in the network infrastructure. In this dissertation, two key security countermeasures are proposed against vulnerabilities at both the hardware and software levels. Based on these countermeasures, an attempt is made to synthesize both countermeasures and propose a unified security paradigm, which can tackle both threat scenarios simultaneously. At the hardware level, this dissertation focuses on the serious threat posed by hardware Trojan (HT) insertion in the field programmable gate array (FPGA) configuration bitstream. Low-end FPGAs are widely used in networking infrastructure and forego critical security features such as encryption of bitstreams to optimize resource constrained deployment. An attacker can reverse engineer the configuration bitstream to insert HTs, which are clandestine malicious circuits, in the FPGA. The proposed countermeasure uses bitstream reverse engineering to perform HT detection and is scalable to any circuit size and topology. With regards to the software level, this dissertation focuses on the vulnerability of deep learning (DL) based network intrusion detection to adversarial examples in IoT networks. Even though DL approaches have proven extremely effective in intrusion detection given the high volume of network traffic in modern IoT networks, DL models are prone to misclassification to minute perturbations in input samples, called adversarial examples. In this dissertation, an unsupervised adversarial example detection approach is proposed which does not require extra hardware overhead for implementation and is based on the intrinsic characteristics of the DL model implemented. As an additional research focus, this dissertation investigates the use of multi-valued logic (MVL) in a circuit decomposition and synthesis approach for beyond Moore circuit implementations. MVL computing provides a larger information capacity compared to binary CMOS logic and is suitable for providing efficient data compression, processing, and communication with the massive network traffic volumes in modern computer networks. Some of the key issues preventing widespread adoption of MVL computing are the complex MVL expressions obtained from traditional logic decomposition approaches and the inefficient usage of binary switches for MVL data representation, communication, and processing. Therefore, this dissertation proposes a logic decomposition and synthesis algorithm for MVL, which combines concepts from machine learning and nanoelectronics. The proposed algorithm decomposes a MVL function to a set of linear expressions implemented by simple output summations, is adaptable to any device technology and radix of representation, and scalable with circuit size and topology. Compared to other popular MVL decomposition methods, the proposed algorithm presents significant savings in hardware overhead and computational complexity. In recent years, small but significant research efforts have been dedicated to usage of MVL in DL classifier design and HT detection. These innovations can pave the way for integrating MVL approaches in the security context at both the hardware and software level. In summary, this dissertation provides a detailed investigation of key security vulnerabilities at the software and hardware levels for modern computer networks, proposes adept and effective countermeasures and in addition, provides a proof-of-concept for a MVL decomposition and synthesis approach for beyond Moore circuits.
Trustworthy Reconfigurable Systems
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Author : Thomas Feller
language : en
Publisher: Springer
Release Date : 2014-08-25
Trustworthy Reconfigurable Systems written by Thomas Feller and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014-08-25 with Computers categories.
Thomas Feller sheds some light on trust anchor architectures for trustworthy reconfigurable systems. He is presenting novel concepts enhancing the security capabilities of reconfigurable hardware. Almost invisible to the user, many computer systems are embedded into everyday artifacts, such as cars, ATMs, and pacemakers. The significant growth of this market segment within the recent years enforced a rethinking with respect to the security properties and the trustworthiness of these systems. The trustworthiness of a system in general equates to the integrity of its system components. Hardware-based trust anchors provide measures to compare the system configuration to reference measurements. Reconfigurable architectures represent a special case in this regard, as in addition to the software implementation, the underlying hardware architecture may be exchanged, even during runtime.
Introduction To Reconfigurable Computing
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Author : Christophe Bobda
language : en
Publisher: Springer Verlag
Release Date : 2007-11-09
Introduction To Reconfigurable Computing written by Christophe Bobda and has been published by Springer Verlag this book supported file pdf, txt, epub, kindle and other format this book has been release on 2007-11-09 with Computers categories.
This work is a comprehensive study of the field. It provides an entry point to the novice willing to move in the research field reconfigurable computing, FPGA and system on programmable chip design. The book can also be used as teaching reference for a graduate course in computer engineering, or as reference to advance electrical and computer engineers. It provides a very strong theoretical and practical background to the field, from the early Estrin’s machine to the very modern architecture such as embedded logic devices.
Reconfigurable System Design And Verification
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Author : Pao-Ann Hsiung
language : en
Publisher: CRC Press
Release Date : 2018-10-08
Reconfigurable System Design And Verification written by Pao-Ann Hsiung and has been published by CRC Press this book supported file pdf, txt, epub, kindle and other format this book has been release on 2018-10-08 with Computers categories.
Reconfigurable systems have pervaded nearly all fields of computation and will continue to do so for the foreseeable future. Reconfigurable System Design and Verification provides a compendium of design and verification techniques for reconfigurable systems, allowing you to quickly search for a technique and determine if it is appropriate to the task at hand. It bridges the gap between the need for reconfigurable computing education and the burgeoning development of numerous different techniques in the design and verification of reconfigurable systems in various application domains. The text explains topics in such a way that they can be immediately grasped and put into practice. It starts with an overview of reconfigurable computing architectures and platforms and demonstrates how to develop reconfigurable systems. This sets up the discussion of the hardware, software, and system techniques that form the core of the text. The authors classify design and verification techniques into primary and secondary categories, allowing the appropriate ones to be easily located and compared. The techniques discussed range from system modeling and system-level design to co-simulation and formal verification. Case studies illustrating real-world applications, detailed explanations of complex algorithms, and self-explaining illustrations add depth to the presentation. Comprehensively covering all techniques related to the hardware-software design and verification of reconfigurable systems, this book provides a single source for information that otherwise would have been dispersed among the literature, making it very difficult to search, compare, and select the technique most suitable. The authors do it all for you, making it easy to find the techniques that fit your system requirements, without having to surf the net or digital libraries to find the candidate techniques and compare them yourself.
Reconfigurable Computing Environment For Hardware Software Co Design
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Author : Tejas Jitendra Mistry
language : en
Publisher:
Release Date : 1998
Reconfigurable Computing Environment For Hardware Software Co Design written by Tejas Jitendra Mistry and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1998 with Computer architecture categories.
Applied Reconfigurable Computing Architectures Tools And Applications
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Author : Iouliia Skliarova
language : en
Publisher: Springer Nature
Release Date :
Applied Reconfigurable Computing Architectures Tools And Applications written by Iouliia Skliarova and has been published by Springer Nature this book supported file pdf, txt, epub, kindle and other format this book has been release on with categories.
Field Programmable Logic And Applications Reconfigurable Computing Is Going Mainstream
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Author : Manfred Glesner
language : en
Publisher: Springer
Release Date : 2003-08-02
Field Programmable Logic And Applications Reconfigurable Computing Is Going Mainstream written by Manfred Glesner and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2003-08-02 with Computers categories.
This book constitutes the refereed proceedings of the 12th International Conference on Field-Programmable Logic and Applications, FPL 2002, held in Montpellier, France, in September 2002. The 104 revised regular papers and 27 poster papers presented together with three invited contributions were carefully reviewed and selected from 214 submissions. The papers are organized in topical sections on rapid prototyping, FPGA synthesis, custom computing engines, DSP applications, reconfigurable fabrics, dynamic reconfiguration, routing and placement, power estimation, synthesis issues, communication applications, new technologies, reconfigurable architectures, multimedia applications, FPGA-based arithmetic, reconfigurable processors, testing and fault-tolerance, crypto applications, multitasking, compilation techniques, etc.
Network On Chip Security And Privacy
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Author : Prabhat Mishra
language : en
Publisher: Springer Nature
Release Date : 2021-06-04
Network On Chip Security And Privacy written by Prabhat Mishra and has been published by Springer Nature this book supported file pdf, txt, epub, kindle and other format this book has been release on 2021-06-04 with Technology & Engineering categories.
This book provides comprehensive coverage of Network-on-Chip (NoC) security vulnerabilities and state-of-the-art countermeasures, with contributions from System-on-Chip (SoC) designers, academic researchers and hardware security experts. Readers will gain a clear understanding of the existing security solutions for on-chip communication architectures and how they can be utilized effectively to design secure and trustworthy systems.
High Performance Architecture And Grid Computing
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Author : Archana Mantri
language : en
Publisher: Springer Science & Business Media
Release Date : 2011-07-05
High Performance Architecture And Grid Computing written by Archana Mantri and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2011-07-05 with Computers categories.
This book constitutes the refereeds proceedings of the International Conference on High Performance Architecture and Grid Computing, HPAGC 2011, held in Chandigarh, India, in July 2011. The 87 revised full papers presented were carefully reviewed and selected from 240 submissions. The papers are organized in topical sections on grid and cloud computing; high performance architecture; information management and network security.
A Practical Introduction To Hardware Software Codesign
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Author : Patrick R. Schaumont
language : en
Publisher: Springer Science & Business Media
Release Date : 2010-09-09
A Practical Introduction To Hardware Software Codesign written by Patrick R. Schaumont and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010-09-09 with Technology & Engineering categories.
This is a practical book for computer engineers who want to understand or implement hardware/software systems. It focuses on problems that require one to combine hardware design with software design – such problems can be solved with hardware/software codesign. When used properly, hardware/software co- sign works better than hardware design or software design alone: it can improve the overall performance of digital systems, and it can shorten their design time. Hardware/software codesign can help a designer to make trade-offs between the ?exibility and the performanceof a digital system. To achieve this, a designer needs to combine two radically different ways of design: the sequential way of dec- position in time, using software, with the parallel way of decomposition in space, using hardware. Intended Audience This book assumes that you have a basic understandingof hardware that you are - miliar with standard digital hardware componentssuch as registers, logic gates, and components such as multiplexers and arithmetic operators. The book also assumes that you know how to write a program in C. These topics are usually covered in an introductory course on computer engineering or in a combination of courses on digital design and software engineering.