A Background Digital Calibration Technique For Oversampling Delta Sigma Analog To Digital Converters With 2 Bit Internal Quantizers
![A Background Digital Calibration Technique For Oversampling Delta Sigma Analog To Digital Converters With 2 Bit Internal Quantizers](https://ardhindie.com/assets/pdf.png)
DOWNLOAD
Download A Background Digital Calibration Technique For Oversampling Delta Sigma Analog To Digital Converters With 2 Bit Internal Quantizers PDF/ePub or read online books in Mobi eBooks. Click Download or Read Online button to get A Background Digital Calibration Technique For Oversampling Delta Sigma Analog To Digital Converters With 2 Bit Internal Quantizers book now. This website allows unlimited access to, at the time of writing, more than 1.5 million titles, including hundreds of thousands of titles in various foreign languages. If the content not found or just blank you must refresh this page
A Background Digital Calibration Technique For Oversampling Delta Sigma Analog To Digital Converters With 2 Bit Internal Quantizers
DOWNLOAD
Author : José S. Niell
language : en
Publisher:
Release Date : 1995
A Background Digital Calibration Technique For Oversampling Delta Sigma Analog To Digital Converters With 2 Bit Internal Quantizers written by José S. Niell and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1995 with categories.
Background Digital Calibration Techniques For High Speed High Resolution Analog To Digital Data Converters
DOWNLOAD
Author : Yun-Shiang Shu
language : en
Publisher:
Release Date : 2008
Background Digital Calibration Techniques For High Speed High Resolution Analog To Digital Data Converters written by Yun-Shiang Shu and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2008 with categories.
A high-speed, high-resolution analog-to-digital converter (ADC) is a key component in broadband communication transceivers, video imaging systems, and instrumentation. As the ADC speed increases with the advances in IC fabrication technology, the ADC resolution is still limited by the non-ideal effects of the circuits, such as device inaccuracy, component mismatch, and finite device gain. A recent trend for enhancing the resolution is to calibrate the non-ideal effects in background with the aid of digital signal processing. These techniques are preferred since the calibration accuracy is not limited by the accuracy of the analog components, and the calibration tracks the variations of process, voltage and temperature without interrupting ADC's normal operation. This dissertation describes the background calibration techniques for three high-speed, high-resolution ADCs using different architectures: pipelined, floating-point, and continuous-time (CT) [delta]-[sigma]. For pipelined ADCs, a background digital calibration technique with signal-dependent dithering scheme is proposed to overcome the dither magnitude and measurement time constraints with the existing fixed-magnitude dithering. A 15-b, 20-MS/s prototype ADC achieves a spurious-free dynamic range (SFDR) of 98 dB and a peak signal-to-noise plus distortion ratio (SNDR) of 73 dB. The chip is fabricated in 0.18-um complementary metal-oxide-semiconductor (CMOS) process, occupies an active area of 2.3 x 1.7 mm2, and consumes 285 mW at 1.8 V. The concept of signal-dependent dithering is also applied to a floating-point ADC (FADC) to calibrate the gain and offset errors in the variable gain amplifier (VGA) stages. A digitally-calibrated 10~15-b 60-MS/s FADC adjusts its quantization steps instantly depending on the sampled input level and enhances the integral non-linearity (INL) from 24 to 0.9 least significant bit (LSB) at a 15-b level for small input signals. The chip is fabricated in 0.18-um CMOS process, occupies 3.5 x 2.5 mm2, and consumes 300 mW at 1.8 V. In the CT [delta]-[sigma] architecture, the active filter is calibrated by injecting a binary pulse dither and nulling it with an LMS algorithm. The proposed technique calibrates the filter time-constant continuously with crystal accuracy, while the conventional master-slave approaches use additional analog components which limit the calibration accuracy. A 3rd-order 4-b prototype in 65-nm CMOS occupies 0.5 mm2 and consumes 50 mW at 1.3 V. It achieves a dynamic range (DR) of 81 dB over an 8-MHz signal bandwidth with a 2.4 Vpp full-scale range. Signal-to-noise ratio (SNR) and SNDR at -1 dBFS are 76 and 70 dB, respectively.
Digital Background Calibration Of Analog To Digital Converters
DOWNLOAD
Author : Bahar Jalali-Farahani
language : en
Publisher: Springer
Release Date : 2013
Digital Background Calibration Of Analog To Digital Converters written by Bahar Jalali-Farahani and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013 with Technology & Engineering categories.
Digital Background Calibration of Analog to Digital Converters takes a deep look at the digital calibration techniques in analog-to-digital converters. The problem of compensating for analog circuits impairments is divided into a system identification problem and an error compensation problem. Different approaches in modelling the analog impairments are discussed. Although Digital Background Calibration of Analog to Digital Converters focuses on two popular types of ADCs mainly: Pipeline and Sigma Delta the techniques can be easily used for any analog and mixed-signal design. Design examples are provided that support the theory and show the application of these techniques in designing high performance data acquisitions systems for wireless communication systems, bio-implantable devices and space electronics.
Oversampling Delta Sigma Data Converters
DOWNLOAD
Author : James C. Candy
language : en
Publisher: Wiley-IEEE Press
Release Date : 1992
Oversampling Delta Sigma Data Converters written by James C. Candy and has been published by Wiley-IEEE Press this book supported file pdf, txt, epub, kindle and other format this book has been release on 1992 with Computers categories.
This now famous anthology brings together various aspects of oversampling methods and compares and evaluates design approaches. It describes the theoretical analysis of converter performances, the actual design of converters and their simulation, circuit implementations, and applications.
Digital Calibration Of A Switched Capacitor Delta Sigma Analog To Digital Converter
DOWNLOAD
Author : Keith Anthony O'Donoghue
language : en
Publisher:
Release Date : 2009
Digital Calibration Of A Switched Capacitor Delta Sigma Analog To Digital Converter written by Keith Anthony O'Donoghue and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2009 with categories.
Performance Tradeoffs And Design Considerations Of Oversampled Delta Sigma Modulators
DOWNLOAD
Author : Thomas Michael Cesear
language : en
Publisher:
Release Date : 1993
Performance Tradeoffs And Design Considerations Of Oversampled Delta Sigma Modulators written by Thomas Michael Cesear and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1993 with categories.
Background Digital Code Error Calibration Of Analog To Digital Converters
DOWNLOAD
Author : Tzi-Hsiung Shu
language : en
Publisher:
Release Date : 1994
Background Digital Code Error Calibration Of Analog To Digital Converters written by Tzi-Hsiung Shu and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1994 with Analog-to-digital converters categories.
Digital Background Calibration Of Time Interleaved Analog To Digital Converters
DOWNLOAD
Author : Shafiq M. Jamal
language : en
Publisher:
Release Date : 2001
Digital Background Calibration Of Time Interleaved Analog To Digital Converters written by Shafiq M. Jamal and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2001 with Analog-to-digital converters categories.
Background Digital Calibration For Interstage Gain Errors And Memory Effects In Pipelined Analog To Digital Converters
DOWNLOAD
Author : John Patrick Keane
language : en
Publisher:
Release Date : 2004
Background Digital Calibration For Interstage Gain Errors And Memory Effects In Pipelined Analog To Digital Converters written by John Patrick Keane and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2004 with categories.
Nested Digital Background Calibration Of A 12 Bit Pipelined Adc Without An Input Sha
DOWNLOAD
Author : Haoyue Wang
language : en
Publisher:
Release Date : 2008
Nested Digital Background Calibration Of A 12 Bit Pipelined Adc Without An Input Sha written by Haoyue Wang and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2008 with categories.