Background Calibration Of Timing Skew In Time Interleaved A D Converters
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Background Calibration Of Timing Skew In Time Interleaved A D Converters
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Author : Manar Ibrahim El-Chammas
language : en
Publisher: Stanford University
Release Date : 2010
Background Calibration Of Timing Skew In Time Interleaved A D Converters written by Manar Ibrahim El-Chammas and has been published by Stanford University this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010 with categories.
The increasing data rate of wireline communication systems leads to more inter-symbol interference, due to the dispersive properties of the communication channel. This requires more complex equalization blocks to meet the required bit-error rate. One solution is to use an Analog-to-Digital Converter (ADC) in the front-end, thus enabling a digitally-equalized serial link. To achieve the high-data rates of these communication systems, a time-interleaved ADC is typically used. However, this type of ADC suffers from several time-varying errors, the most prominent of which is timing skew. This thesis introduces a statistics-based background calibration algorithm that compensates for the effect of timing skew. To demonstrate the background calibration algorithm, a proof-of-concept 5 bit 12 GS/s flash ADC has been fabricated in a 65 nm CMOS process. The design of this ADC takes into consideration the tight power bounds imposed on serial links by optimizing both the time-interleaved and the sub-ADC architecture. Power consumption is further reduced by using calibration circuits to correct the offset of the flash ADC's comparators. In the measured results, the timing skew correction improves the dynamic performance of the time-interleaved ADC by 12 dB, and the proof-of-concept ADC has the lowest published power consumption for ADCs with sample rates higher than 10 GS/s.
Background Calibration Of Time Interleaved Data Converters
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Author : Manar El-Chammas
language : en
Publisher: Springer Science & Business Media
Release Date : 2011-12-17
Background Calibration Of Time Interleaved Data Converters written by Manar El-Chammas and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2011-12-17 with Technology & Engineering categories.
This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture.
Timing Skew Calibration For Time Interleaved Analog To Digital Converters
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Author : Luke Wang
language : en
Publisher:
Release Date : 2014
Timing Skew Calibration For Time Interleaved Analog To Digital Converters written by Luke Wang and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014 with categories.
Time Interleaved Sar Adc With Signal Independent Background Timing Calibration
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Author : Christopher Kaiti Su
language : en
Publisher:
Release Date : 2020
Time Interleaved Sar Adc With Signal Independent Background Timing Calibration written by Christopher Kaiti Su and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2020 with categories.
This thesis describes a background-calibration technique that overcomes timing errors in time-interleaved analog-to-digital converters (ADCs) in a way that is almost independent of the user-provided ADC input signal. Additive dither is widely used to achieve signal-independent background calibration of many errors in data converters [1]. For example, this technique has been used to calibrate for gain mismatch in time-interleaved ADCs [2]. In most cases, however, binary dither has been used, and binary dither is not able to detect timing errors when the user-provided ADC input is zero or constant because timing errors do not produce amplitude errors when the ADC input is constant. This thesis presents a study of the use of a random ramp-based dither signal to calibrate for timing errors in time-interleaved ADCs. To demonstrate the dither-based timing calibration, a prototype 10-bit 500-MS/s 4-channel ADC was fabricated in 40-nm CMOS. With the proposed timing calibration, the Signal-to-Noise-and-Distortion Ratio (SNDR) is 50.1 dB with a user-provided input at 249 MHz while consuming 6.2 mW, giving a figure of merit (FoM) of 48.4 fJ/step. Disabling the ramp after the timing calibration converges improves the SNDR to 51 dB and reduces the power dissipation to 5.8 mW as well as the FoM to 39.8 fJ/step. [1] H. E. Hilton, "A 10-MHz Analog-to-Digital Converter with 110-dB Linearity," Hewlett-Packard Journal, vol. 44, No. 5, pp. 105-112, Oct. 1993. [2] D. Fu, K. C. Dyer, P. J. Hurst, and S. H. Lewis, "A Digital Background Calibration Technique for Time-Interleaved Analog-to-Digital Converters," IEEE J. of Solid-State Circuits, vol. 33, No. 12, pp.1904-1911, Dec. 1998.
Nyquist Ad Converters Sensor Interfaces And Robustness
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Author : Arthur H.M. van Roermund
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-11-26
Nyquist Ad Converters Sensor Interfaces And Robustness written by Arthur H.M. van Roermund and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-11-26 with Technology & Engineering categories.
This book is based on the 18 presentations during the 21st workshop on Advances in Analog Circuit Design. Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.
Selected Papers From The 2018 41st International Conference On Telecommunications And Signal Processing Tsp
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Author : Norbert Herencsar
language : en
Publisher: MDPI
Release Date : 2019-07-01
Selected Papers From The 2018 41st International Conference On Telecommunications And Signal Processing Tsp written by Norbert Herencsar and has been published by MDPI this book supported file pdf, txt, epub, kindle and other format this book has been release on 2019-07-01 with Technology & Engineering categories.
This Special Issue contains a series of excellent research works on telecommunications and signal processing, selected from the 2018 41st International Conference on Telecommunications and Signal Processing (TSP) which was held on July 4–6, 2018, in Athens, Greece. The conference was organized in cooperation with the IEEE Region 8 (Europe, Middle East, and Africa), IEEE Greece Section, IEEE Czechoslovakia Section, and IEEE Czechoslovakia Section SP/CAS/COM Joint Chapter by seventeen universities from the Czech Republic, Hungary, Turkey, Taiwan, Japan, Slovak Republic, Spain, Bulgaria, France, Slovenia, Croatia, and Poland, for academics, researchers, and developers, and serves as a premier international forum for the annual exchange and promotion of the latest advances in telecommunication technology and signal processing. The aim of the conference is to bring together both novice and experienced scientists, developers, and specialists, to meet new colleagues, collect new ideas, and establish new cooperation between research groups from universities, research centers, and private sectors worldwide. This collection of 10 papers is highly recommended for researchers, and believed to be interesting, inspiring, and motivating for readers in their further research.
Background Calibration Of Time Interleaved Data Converters
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Author :
language : en
Publisher:
Release Date : 2012-01-21
Background Calibration Of Time Interleaved Data Converters written by and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-01-21 with categories.
High Resolution And High Speed Integrated Cmos Ad Converters For Low Power Applications
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Author : Weitao Li
language : en
Publisher: Springer
Release Date : 2017-08-01
High Resolution And High Speed Integrated Cmos Ad Converters For Low Power Applications written by Weitao Li and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2017-08-01 with Technology & Engineering categories.
This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
Trends In Digital Signal Processing
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Author : Yong Ching Lim
language : en
Publisher: CRC Press
Release Date : 2015-07-24
Trends In Digital Signal Processing written by Yong Ching Lim and has been published by CRC Press this book supported file pdf, txt, epub, kindle and other format this book has been release on 2015-07-24 with Computers categories.
Digital signal processing is ubiquitous. It is an essential ingredient in many of today's electronic devices, ranging from medical equipment to weapon systems. It makes the difference between dumb and intelligent systems. This book is organized into five parts: (1) Introduction, which contains an account of Prof. Constantinides' contribution to the
12 Bit 600ms S Time Interleaved Sar Adc With Background Timing Skew Calibration
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Author : 魏衍昕
language : en
Publisher:
Release Date : 2014
12 Bit 600ms S Time Interleaved Sar Adc With Background Timing Skew Calibration written by 魏衍昕 and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014 with categories.