Digital Calibration Of Double Sampled Time Interleaved Analog To Digital Converters

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Digital Calibration Of Double Sampled Time Interleaved Analog To Digital Converters

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Author : Chi Ho Law
language : en
Publisher:
Release Date : 2009

Digital Calibration Of Double Sampled Time Interleaved Analog To Digital Converters written by Chi Ho Law and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2009 with categories.

Time Interleaved Analog To Digital Converters

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Author : Simon Louwsma
language : en
Publisher: Springer Science & Business Media
Release Date : 2010-09-08

Time Interleaved Analog To Digital Converters written by Simon Louwsma and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010-09-08 with Technology & Engineering categories.

Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.

A 16 B 10m Sample S Split Interleaved Analog To Digital Converter

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Author : Rosamaria Croughwell
language : en
Publisher:
Release Date : 2007

A 16 B 10m Sample S Split Interleaved Analog To Digital Converter written by Rosamaria Croughwell and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2007 with categories.

Abstract: This work describes the integrated circuit design of a 16-bit, 10Msample/sec, combination 'split' interleaved analog to digital converter. Time interleaving of analog to digital converters has been used successfully for many years as a technique to achieve faster speeds using multiple identical converters. However, efforts to achieve higher resolutions with this technique have been difficult due to the precise matching required of the converter channels. The most troublesome errors in these types of converters are gain, offset and timing differences between channels. The 'split ADC' is a new concept that allows the use of a deterministic, digital, self calibrating algorithm. In this approach, an ADC is split into two paths, producing two output codes from the same input sample. The difference of these two codes is used as the calibration signal for an LMS error estimation algorithm that drives the difference error to zero. The ADC is calibrated when the codes are equal and the output is taken as the average of the two codes. The 'split' ADC concept and interleaved architecture are combined in this IC design to form the core of a high speed, high resolution, and self-calibrating ADC system. The dual outputs are used to drive a digital calibration engine to correct for the channel mismatch errors. This system has the speed benefits of interleaving while maintaining high resolution. The hardware for the algorithm as well as the ADC can be implemented in a standard 0.25um CMOS process, resulting in a relatively inexpensive solution. This work is supported by grants from Analog Devices Incorporated (ADI) and the National Science Foundation (NSF).

Digital Background Calibration Of Time Interleaved Analog To Digital Converters

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Author : Shafiq M. Jamal
language : en
Publisher:
Release Date : 2001

Digital Background Calibration Of Time Interleaved Analog To Digital Converters written by Shafiq M. Jamal and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2001 with Analog-to-digital converters categories.

Background Calibration Of Time Interleaved Data Converters

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Author : Manar El-Chammas
language : en
Publisher: Springer Science & Business Media
Release Date : 2011-12-17

Background Calibration Of Time Interleaved Data Converters written by Manar El-Chammas and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2011-12-17 with Technology & Engineering categories.

This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture.

Time Interleaved Analog To Digital Converters For Digital Communications

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Author : Tsung-Heng Tsai
language : en
Publisher:
Release Date : 2005

Time Interleaved Analog To Digital Converters For Digital Communications written by Tsung-Heng Tsai and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2005 with categories.

Blind Calibration For Time Interleaved Analog To Digital Converters

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Author : Yuhui Huang
language : en
Publisher:
Release Date : 2006

Blind Calibration For Time Interleaved Analog To Digital Converters written by Yuhui Huang and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2006 with categories.

All Digital Background Calibration For Time Interleaved And Successive Approximation Register Analog To Digital Converters

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Author : Christopher Leonidas David
language : en
Publisher:
Release Date : 2010

All Digital Background Calibration For Time Interleaved And Successive Approximation Register Analog To Digital Converters written by Christopher Leonidas David and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010 with categories.

Abstract: The growth of digital systems underscores the need to convert analog information to the digital domain at high speeds and with great accuracy. Analog-to-Digital Converter (ADC) calibration is often a limiting factor, requiring longer calibration times to achieve higher accuracy. The goal of this dissertation is to perform a fully digital background calibration using an arbitrary input signal for A/D converters. The work presented here adapts the cyclic "Split-ADC" calibration method to the time interleaved (TI) and successive approximation register (SAR) architectures. The TI architecture has three types of linear mismatch errors: offset, gain and aperture time delay. By correcting all three mismatch errors in the digital domain, each converter is capable of operating at the fastest speed allowed by the process technology. The total number of correction parameters required for calibration is dependent on the interleaving ratio, M. To adapt the "Split-ADC" method to a TI system, 2M+1 half-sized converters are required to estimate 3(2M+1) correction parameters. This thesis presents a 4:1 "Split-TI" converter that achieves full convergence in less than 400,000 samples. The SAR architecture employs a binary weight capacitor array to convert analog inputs into digital output codes. Mismatch in the capacitor weights results in non-linear distortion error. By adding redundant bits and dividing the array into individual unit capacitors, the "Split-SAR" method can estimate the mismatch and correct the digital output code. The results from this work show a reduction in the non-linear distortion with the ability to converge in less than 750,000 samples.

Circuit Techniques For Low Voltage And High Speed A D Converters

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Author : Mikko E. Waltari
language : en
Publisher: Springer Science & Business Media
Release Date : 2005-12-30

Circuit Techniques For Low Voltage And High Speed A D Converters written by Mikko E. Waltari and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2005-12-30 with Technology & Engineering categories.

This useful monograph presents a total of seven prototypes: two double-sampled S/H circuits, a time-interleaved ADC, an IF-sampling self-calibrated pipelined ADC, a current steering DAC with a deglitcher, and two pipelined ADCs employing the SO techniques.

Reference Free Cmos Pipeline Analog To Digital Converters

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Author : Michael Figueiredo
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-08-24

Reference Free Cmos Pipeline Analog To Digital Converters written by Michael Figueiredo and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-08-24 with Technology & Engineering categories.

This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.