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Intentional And Unintentional Side Channels In Embedded Systems


Intentional And Unintentional Side Channels In Embedded Systems
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Intentional And Unintentional Side Channels In Embedded Systems


Intentional And Unintentional Side Channels In Embedded Systems
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Author : Georg Tobias Becker
language : en
Publisher:
Release Date : 2014

Intentional And Unintentional Side Channels In Embedded Systems written by Georg Tobias Becker and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014 with Computer security categories.


Side-channel attacks have become a very important and well-studied area in computer security. Traditionally, side-channels are unwanted byproducts of implementations that can be exploited by an attacker to reveal secret information. In this thesis, we take a different approach towards side-channels. Instead of exploiting already existing side-channels, they are inserted intentionally into designs. These intentional side-channels have the nice property of being hidden in the noise. Only their implementer can make use of them. This makes them a very interesting building block for different applications, especially since they can also be implemented very efficiently. In this thesis, techniques to build intentional side-channels for embedded software designs, RTL level hardware designs, as well as layout level hardware implementations are presented. The usefulness of these techniques is demonstrated by building efficient side-channel based software and hardware watermarks for intellectual property protection. These side-channel based watermarks can also be extended to be used as a tool to detect counterfeit ICs, another problem the embedded system industry is facing. However, intentional side-channels also have malicious applications. In this thesis, an extremely stealthy approach to build hardware Trojans is introduced. By only modifying the IC below the transistor level, meaningful hardware Trojans can be built without adding a single transistor. Such hardware Trojans are especially hard to detect with currently proposed Trojan detection mechanisms and highlight not only the fact that new Trojan detection mechanisms are needed, but also how stealthy intentional side-channels can be. Besides intentional side-channels, this thesis also examines unintentional side-channels in delay based Physically Unclonable Functions (PUFs). PUFs have emerged as an alternative to traditional cryptography and are believed to be especially well suited for counterfeit protection. They are also often believed to be more resistant to side-channel attacks than traditional cryptography. However, by combining side-channel analysis with machine learning, we demonstrate that delay based PUFs can be attacked, using both active as well as passive side-channels. The results not only raise strong doubt about the side-channel resistance and usefulness of delay based PUFs, but also show how powerful combining side-channel analysis techniques with machine learning can be in practice.



Side Channel Analysis Of Embedded Systems


Side Channel Analysis Of Embedded Systems
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Author : Maamar Ouladj
language : en
Publisher: Springer Nature
Release Date : 2021-07-28

Side Channel Analysis Of Embedded Systems written by Maamar Ouladj and has been published by Springer Nature this book supported file pdf, txt, epub, kindle and other format this book has been release on 2021-07-28 with Computers categories.


It has been more than 20 years since the seminal publications on side-channel attacks. They aim at extracting secrets from embedded systems while they execute cryptographic algorithms, and they consist of two steps, measurement and analysis. This book tackles the analysis part, especially under situations where the targeted device is protected by random masking. The authors explain advances in the field and provide the reader with mathematical formalizations. They present all known analyses within the same notation framework, which allows the reader to rapidly understand and learn contrasting approaches. It will be useful as a graduate level introduction, also for self-study by researchers and professionals, and the examples are taken from real-world datasets.



Physical Side Channels In Embedded Hardware Security


Physical Side Channels In Embedded Hardware Security
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Author : Ge Li (Ph. D. in electrical and computer engineering)
language : en
Publisher:
Release Date : 2022

Physical Side Channels In Embedded Hardware Security written by Ge Li (Ph. D. in electrical and computer engineering) and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2022 with categories.


The advancement of digital silicon technology brings a variety of novel embedded systems to our daily life. As a unique yet critical requirement, the demand for security and privacy in systems has been rising. Over the decades, the software-layer security has been widely investigated. Unfortunately, security related to the physical/hardware implementation of systems, has received less attention. Physical side channel is one of the most widely exploited attack vectors by which an adversary can target the system. Physical side-channel analysis extracts secrets via an unintended physical information leakage from embedded hardware, such as via its power consumption or EM emanation. This dissertation investigates physical side-channel vulnerabilities as well as defenses in several emerging applications. At the same time, since physical side channel carries information of the system, a malicious exploit targeting the system may leave its footprint in the collected physical information. This dissertation also explores the possibility of utilizing physical side channels to defend against attacks. This dissertation first addresses the vulnerability of an ASIC AES implementation to a new side-channel attack based on localized electromagnetic analysis, which is an especially potent threat to security of embedded cryptographic implementations. The attack utilizes high-resolution EM probes to localize and exploit information leakage in sub-circuits of a system, providing information not available in traditional (far-field) EM and power attacks. This dissertation proposes a countermeasure based on randomizing the assignment of sensitive data to parallel datapath components in a high-performance implementation of AES. A permutation network, controlled by a transient random value, creates a dynamic random mapping between the state registers and the set of S-boxes. This randomization results in a significant reduction of exploitable leakage. This dissertation then studies whether the Deep Neural Networks (DNN) deployed on spatial accelerators are vulnerable to power side-channel attacks. With proliferation of DNN-based applications, the confidentiality of DNN model is an important commercial goal. Spatial accelerators, that parallelize matrix/vector operations, are utilized for enhancing energy efficiency of DNN computation. We investigate the vulnerability of complex spatial accelerators to model extraction attacks derived from differential power analysis (DPA) of cryptographic devices. The dissertation implements two systolic array architectures of different dimensions (1D and 2D) on an FPGA, and shows that both architectures are ultimately vulnerable. A conventional DPA succeeds fully on the 1D array, and a novel template-based DPA, with multiple profiling phases, is able to fully break the 2D array, Chapter 3. Next, this dissertation investigates the use of the power side channel to detect malware in the Linux boot running on an embedded system. The boot sequence is the initial process executed on any computing system and is often the target of malicious exploits. We develop the first non-intrusive power-based malware detection method to ensure security of boot in an embedded system with the Intel Xeon-class CPU. The dissertation considers the threat of untrusted devices plugged in a confidential system, and the threat of the compromised kernel that the system boots into. The detector uses features based on optimal strategically-chosen phases in classification. This improves classification accuracy compared to existing approaches which considers full power trace non-discriminately. We finally demonstrate an ensemble classification scheme based on optimal phases of a limited, representative set of attacks, with a reduced training cost. It shows improved classification accuracy compared to the baseline full trace classifiers, Chapter 4. As a side goal, this dissertation then studies enhancements to a novel physical security primitive, the lattice PUF, which is a strong PUF with provable security against ML attacks with both classical and quantum computers. PUFs are security primitives which can be deployed to defend against various physical attacks. It is critical to convert a theoretically sound construction into an efficient physical implementation. The original lattice PUF proposal only considers resource-constrained designs. We develop a set of latency-optimized implementations for lattice PUF. Lattice PUF is constructed with a physically obfuscated key and an LWE decryption function block. To reduce latency, the latency-optimized design uses an unrolled LFSR which produces multiple pseudo-random bits per cycle, and a parallel datapath which allows generating multiple response bits simultaneously. For design space exploration, the dissertation prototyped several lattice PUF designs on a Spartan 6 FPGA. The optimized design achieves a significant reduction (148X) in latency, at a moderate increase in hardware utilization, Chapter 5. Finally, this dissertation investigates a novel security primitive for image attestation, which is resilient against physical side-channel analysis. The improper or malicious uses of images raise the need for effective image attestation. No current solution allows perceptual image hashing along with secure physical identity binding. We propose a concept of physical unclonable perceptual hash function (PU-PHF), which allows securely verifying authenticity of both content and origin of an image. The primitive utilizes a strong PUF, attached to the source camera, to produce a hash of each captured image. The key leakage vulnerability is eliminated by directly adopting the response of a keyless strong PUF as an image hash entwined with physical identity. The PUF-caused hash errors are handled by a distinguisher analyzing distributionally-different hash errors to PUF's un-intentional errors and the intentional modifications, without the expensive error correction codes (ECC). The dissertation realizes the PU-PHF using a novel ML-resilient SCA-PUF and shows great attestation accuracy under the various abnormal scenarios with our evaluation dataset



A New Frequency Based Side Channel Attack For Embedded Systems


A New Frequency Based Side Channel Attack For Embedded Systems
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Author : Chin Chi Tiu
language : en
Publisher:
Release Date : 2005

A New Frequency Based Side Channel Attack For Embedded Systems written by Chin Chi Tiu and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2005 with categories.




Cryptographic Hardware And Embedded Systems Ches 2002


Cryptographic Hardware And Embedded Systems Ches 2002
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Author : Burton S. Jr. Kaliski
language : en
Publisher: Springer
Release Date : 2003-08-02

Cryptographic Hardware And Embedded Systems Ches 2002 written by Burton S. Jr. Kaliski and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2003-08-02 with Computers categories.


ThesearetheproceedingsofCHES2002,theFourthWorkshoponCryptographic Hardware and Embedded Systems. After the ?rst two CHES Workshops held in Massachusetts, and the third held in Europe, this is the ?rst Workshop on the West Coast of the United States. There was a record number of submissions this year and in response the technical program was extended to 3 days. As is evident by the papers in these proceedings, there have been again many excellent submissions. Selecting the papers for this year’s CHES was not an easy task, and we regret that we could not accept many contributions due to the limited availability of time. There were 101 submissions this year, of which 39 were selected for presentation. We continue to observe a steady increase over previous years: 42 submissions at CHES ’99, 51 at CHES 2000, and 66 at CHES 2001. We interpret this as a continuing need for a workshop series that c- bines theory and practice for integrating strong security features into modern communicationsandcomputerapplications. Inadditiontothesubmittedcont- butions, Jean-Jacques Quisquater (UCL, Belgium), Sanjay Sarma (MIT, USA) and a panel of experts on hardware random number generation gave invited talks. As in the previous years, the focus of the Workshop is on all aspects of cr- tographic hardware and embedded system security. Of special interest were c- tributionsthatdescribenewmethodsfore?cienthardwareimplementationsand high-speed software for embedded systems, e. g. , smart cards, microprocessors, DSPs, etc. CHES also continues to be an important forum for new theoretical and practical ?ndings in the important and growing ?eld of side-channel attacks.



Side Channel Attacks


Side Channel Attacks
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Author : Seokhie Hong
language : en
Publisher: MDPI
Release Date : 2019-06-12

Side Channel Attacks written by Seokhie Hong and has been published by MDPI this book supported file pdf, txt, epub, kindle and other format this book has been release on 2019-06-12 with Technology & Engineering categories.


This Special Issue provides an opportunity for researchers in the area of side-channel attacks (SCAs) to highlight the most recent exciting technologies. The research papers published in this Special Issue represent recent progress in the field, including research on power analysis attacks, cache-based timing attacks, system-level countermeasures, and so on.



Burdens Of Proof


Burdens Of Proof
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Author : Jean-Francois Blanchette
language : en
Publisher: MIT Press
Release Date : 2012-04-27

Burdens Of Proof written by Jean-Francois Blanchette and has been published by MIT Press this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-04-27 with Computers categories.


An examination of the challenges of establishing the authenticity of electronic documents—in particular the design of a cryptographic equivalent to handwritten signatures. The gradual disappearance of paper and its familiar evidential qualities affects almost every dimension of contemporary life. From health records to ballots, almost all documents are now digitized at some point of their life cycle, easily copied, altered, and distributed. In Burdens of Proof, Jean-François Blanchette examines the challenge of defining a new evidentiary framework for electronic documents, focusing on the design of a digital equivalent to handwritten signatures. From the blackboards of mathematicians to the halls of legislative assemblies, Blanchette traces the path of such an equivalent: digital signatures based on the mathematics of public-key cryptography. In the mid-1990s, cryptographic signatures formed the centerpiece of a worldwide wave of legal reform and of an ambitious cryptographic research agenda that sought to build privacy, anonymity, and accountability into the very infrastructure of the Internet. Yet markets for cryptographic products collapsed in the aftermath of the dot-com boom and bust along with cryptography's social projects. Blanchette describes the trials of French bureaucracies as they wrestled with the application of electronic signatures to real estate contracts, birth certificates, and land titles, and tracks the convoluted paths through which electronic documents acquire moral authority. These paths suggest that the material world need not merely succumb to the virtual but, rather, can usefully inspire it. Indeed, Blanchette argues, in renewing their engagement with the material world, cryptographers might also find the key to broader acceptance of their design goals.



Side Channel Analysis


Side Channel Analysis
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Author : Carlos Moreno
language : en
Publisher:
Release Date : 2013

Side Channel Analysis written by Carlos Moreno and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013 with categories.


Side-Channel Analysis plays an important role in cryptology, as it represents an important class of attacks against cryptographic implementations, especially in the context of embedded systems such as hand-held mobile devices, smart cards, RFID tags, etc. These types of attacks bypass any intrinsic mathematical security of the cryptographic algorithm or protocol by exploiting observable side-effects of the execution of the cryptographic operation that may exhibit some relationship with the internal (secret) parameters in the device. Two of the main types of side-channel attacks are timing attacks or timing analysis, where the relationship between the execution time and secret parameters is exploited; and power analysis, which exploits the relationship between power consumption and the operations being executed by a processor as well as the data that these operations work with. For power analysis, two main types have been proposed: simple power analysis (SPA) which relies on direct observation on a single measurement, and differential power analysis (DPA), which uses multiple measurements combined with statistical processing to extract information from the small variations in power consumption correlated to the data. In this thesis, we propose several countermeasures to these types of attacks, with the main themes being timing analysis and SPA. In addition to these themes, one of our contributions expands upon the ideas behind SPA to present a constructive use of these techniques in the context of embedded systems debugging. In our first contribution, we present a countermeasure against timing attacks where an optimized form of idle-wait is proposed with the goal of making the observable decryption time constant for most operations while maintaining the overhead to a minimum. We show that not only we reduce the overhead in terms of execution speed, but also the computational cost of the countermeasure, which represents a considerable advantage in the context of devices relying on battery power, where reduced computations translates into lower power consumption and thus increased battery life. This is indeed one of the important themes for all of the contributions related to countermeasures to side- channel attacks. Our second and third contributions focus on power analysis; specifically, SPA. We address the issue of straightforward implementations of binary exponentiation algorithms (or scalar multiplication, in the context of elliptic curve cryptography) making a cryptographic system vulnerable to SPA. Solutions previously proposed introduce a considerable performance penalty. We propose a new method, namely Square-and-Buffered- Multiplications (SABM), that implements an SPA-resistant binary exponentiation exhibiting optimal execution time at the cost of a small amount of storage -- O(\sqrt(\ell)), where \ell is the bit length of the exponent. The technique is optimal in the sense that it adds SPA-resistance to an underlying binary exponentiation algorithm while introducing zero computational overhead. We then present several new SPA-resistant algorithms that result from a novel way of combining the SABM method with an alternative binary exponentiation algorithm where the exponent is split in two halves for simultaneous processing, showing that by combining the two techniques, we can make use of signed-digit representations of the exponent to further improve performance while maintaining SPA-resistance. We also discuss the possibility of our method being implemented in a way that a certain level of resistance against DPA may be obtained. In a related contribution, we extend these ideas used in SPA and propose a technique to non-intrusively monitor a device and trace program execution, with the intended application of assisting in the difficult task of debugging embedded systems at deployment or production stage, when standard debugging tools or auxiliary components to facilitate debugging are no longer enabled in the device. One of the important highlights of this contribution is the fact that the system works on a standard PC, capturing the power traces through the recording input of the sound card.



Formal Aspects In Security And Trust


Formal Aspects In Security And Trust
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Author : Pierpaolo Degano
language : en
Publisher: Springer Science & Business Media
Release Date : 2010-04-20

Formal Aspects In Security And Trust written by Pierpaolo Degano and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010-04-20 with Business & Economics categories.


This book constitutes the thoroughly refereed post-workshop proceedings of the 6th International Workshop on Formal Aspects in Security and Trust, FAST 2009, held under the auspices of IFIP WG 1.7 in Eindhoven, The Netherlands, in November 2009 as an event of the Formal Methods Week, FMweek 2009. The 18 revised papers presented together with an abstract of the invited lecture were carefully reviewed and selected from 50 submissions. The papers focus of formal aspects in security and trust policy models, security protocol design and analysis, formal models of trust and reputation, logics for security and trust, distributed trust management systems, trust-based reasoning, digital assets protection, data protection, privacy and id issues, information flow analysis, language-based security, security and trust aspects in ubiquitous computing, validation/analysis tools, Web service security/trust/privacy, grid security, security risk assessment, and case studies.



Secure Smart Embedded Devices Platforms And Applications


Secure Smart Embedded Devices Platforms And Applications
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Author : Konstantinos Markantonakis
language : en
Publisher: Springer Science & Business Media
Release Date : 2013-09-14

Secure Smart Embedded Devices Platforms And Applications written by Konstantinos Markantonakis and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013-09-14 with Computers categories.


New generations of IT users are increasingly abstracted from the underlying devices and platforms that provide and safeguard their services. As a result they may have little awareness that they are critically dependent on the embedded security devices that are becoming pervasive in daily modern life. Secure Smart Embedded Devices, Platforms and Applications provides a broad overview of the many security and practical issues of embedded devices, tokens, and their operation systems, platforms and main applications. It also addresses a diverse range of industry/government initiatives and considerations, while focusing strongly on technical and practical security issues. The benefits and pitfalls of developing and deploying applications that rely on embedded systems and their security functionality are presented. A sufficient level of technical detail to support embedded systems is provided throughout the text, although the book is quite readable for those seeking awareness through an initial overview of the topics. This edited volume benefits from the contributions of industry and academic experts and helps provide a cross-discipline overview of the security and practical issues for embedded systems, tokens, and platforms. It is an ideal complement to the earlier work, Smart Cards Tokens, Security and Applications from the same editors.