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Physical Side Channels In Embedded Hardware Security


Physical Side Channels In Embedded Hardware Security
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Physical Side Channels In Embedded Hardware Security


Physical Side Channels In Embedded Hardware Security
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Author : Ge Li (Ph. D. in electrical and computer engineering)
language : en
Publisher:
Release Date : 2022

Physical Side Channels In Embedded Hardware Security written by Ge Li (Ph. D. in electrical and computer engineering) and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2022 with categories.


The advancement of digital silicon technology brings a variety of novel embedded systems to our daily life. As a unique yet critical requirement, the demand for security and privacy in systems has been rising. Over the decades, the software-layer security has been widely investigated. Unfortunately, security related to the physical/hardware implementation of systems, has received less attention. Physical side channel is one of the most widely exploited attack vectors by which an adversary can target the system. Physical side-channel analysis extracts secrets via an unintended physical information leakage from embedded hardware, such as via its power consumption or EM emanation. This dissertation investigates physical side-channel vulnerabilities as well as defenses in several emerging applications. At the same time, since physical side channel carries information of the system, a malicious exploit targeting the system may leave its footprint in the collected physical information. This dissertation also explores the possibility of utilizing physical side channels to defend against attacks. This dissertation first addresses the vulnerability of an ASIC AES implementation to a new side-channel attack based on localized electromagnetic analysis, which is an especially potent threat to security of embedded cryptographic implementations. The attack utilizes high-resolution EM probes to localize and exploit information leakage in sub-circuits of a system, providing information not available in traditional (far-field) EM and power attacks. This dissertation proposes a countermeasure based on randomizing the assignment of sensitive data to parallel datapath components in a high-performance implementation of AES. A permutation network, controlled by a transient random value, creates a dynamic random mapping between the state registers and the set of S-boxes. This randomization results in a significant reduction of exploitable leakage. This dissertation then studies whether the Deep Neural Networks (DNN) deployed on spatial accelerators are vulnerable to power side-channel attacks. With proliferation of DNN-based applications, the confidentiality of DNN model is an important commercial goal. Spatial accelerators, that parallelize matrix/vector operations, are utilized for enhancing energy efficiency of DNN computation. We investigate the vulnerability of complex spatial accelerators to model extraction attacks derived from differential power analysis (DPA) of cryptographic devices. The dissertation implements two systolic array architectures of different dimensions (1D and 2D) on an FPGA, and shows that both architectures are ultimately vulnerable. A conventional DPA succeeds fully on the 1D array, and a novel template-based DPA, with multiple profiling phases, is able to fully break the 2D array, Chapter 3. Next, this dissertation investigates the use of the power side channel to detect malware in the Linux boot running on an embedded system. The boot sequence is the initial process executed on any computing system and is often the target of malicious exploits. We develop the first non-intrusive power-based malware detection method to ensure security of boot in an embedded system with the Intel Xeon-class CPU. The dissertation considers the threat of untrusted devices plugged in a confidential system, and the threat of the compromised kernel that the system boots into. The detector uses features based on optimal strategically-chosen phases in classification. This improves classification accuracy compared to existing approaches which considers full power trace non-discriminately. We finally demonstrate an ensemble classification scheme based on optimal phases of a limited, representative set of attacks, with a reduced training cost. It shows improved classification accuracy compared to the baseline full trace classifiers, Chapter 4. As a side goal, this dissertation then studies enhancements to a novel physical security primitive, the lattice PUF, which is a strong PUF with provable security against ML attacks with both classical and quantum computers. PUFs are security primitives which can be deployed to defend against various physical attacks. It is critical to convert a theoretically sound construction into an efficient physical implementation. The original lattice PUF proposal only considers resource-constrained designs. We develop a set of latency-optimized implementations for lattice PUF. Lattice PUF is constructed with a physically obfuscated key and an LWE decryption function block. To reduce latency, the latency-optimized design uses an unrolled LFSR which produces multiple pseudo-random bits per cycle, and a parallel datapath which allows generating multiple response bits simultaneously. For design space exploration, the dissertation prototyped several lattice PUF designs on a Spartan 6 FPGA. The optimized design achieves a significant reduction (148X) in latency, at a moderate increase in hardware utilization, Chapter 5. Finally, this dissertation investigates a novel security primitive for image attestation, which is resilient against physical side-channel analysis. The improper or malicious uses of images raise the need for effective image attestation. No current solution allows perceptual image hashing along with secure physical identity binding. We propose a concept of physical unclonable perceptual hash function (PU-PHF), which allows securely verifying authenticity of both content and origin of an image. The primitive utilizes a strong PUF, attached to the source camera, to produce a hash of each captured image. The key leakage vulnerability is eliminated by directly adopting the response of a keyless strong PUF as an image hash entwined with physical identity. The PUF-caused hash errors are handled by a distinguisher analyzing distributionally-different hash errors to PUF's un-intentional errors and the intentional modifications, without the expensive error correction codes (ECC). The dissertation realizes the PU-PHF using a novel ML-resilient SCA-PUF and shows great attestation accuracy under the various abnormal scenarios with our evaluation dataset



Security In Embedded Devices


Security In Embedded Devices
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Author : Catherine H. Gebotys
language : en
Publisher: Springer Science & Business Media
Release Date : 2009-12-03

Security In Embedded Devices written by Catherine H. Gebotys and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2009-12-03 with Technology & Engineering categories.


Although security is prevalent in PCs, wireless communications and other systems today, it is expected to become increasingly important and widespread in many embedded devices. For some time, typical embedded system designers have been dealing with tremendous challenges in performance, power, price and reliability. However now they must additionally deal with definition of security requirements, security design and implementation. Given the limited number of security engineers in the market, large background of cryptography with which these standards are based upon, and difficulty of ensuring the implementation will also be secure from attacks, security design remains a challenge. This book provides the foundations for understanding embedded security design, outlining various aspects of security in devices ranging from typical wireless devices such as PDAs through to contactless smartcards to satellites.



Side Channel Analysis Of Embedded Systems


Side Channel Analysis Of Embedded Systems
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Author : Maamar Ouladj
language : en
Publisher: Springer Nature
Release Date : 2021-07-28

Side Channel Analysis Of Embedded Systems written by Maamar Ouladj and has been published by Springer Nature this book supported file pdf, txt, epub, kindle and other format this book has been release on 2021-07-28 with Computers categories.


It has been more than 20 years since the seminal publications on side-channel attacks. They aim at extracting secrets from embedded systems while they execute cryptographic algorithms, and they consist of two steps, measurement and analysis. This book tackles the analysis part, especially under situations where the targeted device is protected by random masking. The authors explain advances in the field and provide the reader with mathematical formalizations. They present all known analyses within the same notation framework, which allows the reader to rapidly understand and learn contrasting approaches. It will be useful as a graduate level introduction, also for self-study by researchers and professionals, and the examples are taken from real-world datasets.



Intentional And Unintentional Side Channels In Embedded Systems


Intentional And Unintentional Side Channels In Embedded Systems
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Author : Georg Tobias Becker
language : en
Publisher:
Release Date : 2014

Intentional And Unintentional Side Channels In Embedded Systems written by Georg Tobias Becker and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014 with Computer security categories.


Side-channel attacks have become a very important and well-studied area in computer security. Traditionally, side-channels are unwanted byproducts of implementations that can be exploited by an attacker to reveal secret information. In this thesis, we take a different approach towards side-channels. Instead of exploiting already existing side-channels, they are inserted intentionally into designs. These intentional side-channels have the nice property of being hidden in the noise. Only their implementer can make use of them. This makes them a very interesting building block for different applications, especially since they can also be implemented very efficiently. In this thesis, techniques to build intentional side-channels for embedded software designs, RTL level hardware designs, as well as layout level hardware implementations are presented. The usefulness of these techniques is demonstrated by building efficient side-channel based software and hardware watermarks for intellectual property protection. These side-channel based watermarks can also be extended to be used as a tool to detect counterfeit ICs, another problem the embedded system industry is facing. However, intentional side-channels also have malicious applications. In this thesis, an extremely stealthy approach to build hardware Trojans is introduced. By only modifying the IC below the transistor level, meaningful hardware Trojans can be built without adding a single transistor. Such hardware Trojans are especially hard to detect with currently proposed Trojan detection mechanisms and highlight not only the fact that new Trojan detection mechanisms are needed, but also how stealthy intentional side-channels can be. Besides intentional side-channels, this thesis also examines unintentional side-channels in delay based Physically Unclonable Functions (PUFs). PUFs have emerged as an alternative to traditional cryptography and are believed to be especially well suited for counterfeit protection. They are also often believed to be more resistant to side-channel attacks than traditional cryptography. However, by combining side-channel analysis with machine learning, we demonstrate that delay based PUFs can be attacked, using both active as well as passive side-channels. The results not only raise strong doubt about the side-channel resistance and usefulness of delay based PUFs, but also show how powerful combining side-channel analysis techniques with machine learning can be in practice.



Cryptographic Hardware And Embedded Systems Ches 2013


Cryptographic Hardware And Embedded Systems Ches 2013
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Author : Guido Marco Bertoni
language : en
Publisher: Springer
Release Date : 2013-07-19

Cryptographic Hardware And Embedded Systems Ches 2013 written by Guido Marco Bertoni and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013-07-19 with Computers categories.


This book constitutes the proceedings of the 15th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2013, held in Santa Barbara, CA, USA, in August 2013. The 27 papers presented were carefully reviewed and selected from 132 submissions. The papers are organized in the following topical sections: side-channel attacks; physical unclonable function; lightweight cryptography; hardware implementations and fault attacks; efficient and secure implementations; elliptic curve cryptography; masking; side-channel attacks and countermeasures.



Cryptographic Hardware And Embedded Systems Ches 2009


Cryptographic Hardware And Embedded Systems Ches 2009
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Author : Christophe Clavier
language : en
Publisher: Springer Science & Business Media
Release Date : 2009-08-28

Cryptographic Hardware And Embedded Systems Ches 2009 written by Christophe Clavier and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2009-08-28 with Computers categories.


CHES 2009, the 11th workshop on Cryptographic Hardware and Embedded Systems, was held in Lausanne, Switzerland, September 6–9, 2009. The wo- shop was sponsored by the International Association for Cryptologic Research (IACR). The workshop attracted a record number of 148 submissions from 29 co- tries, of which the Program Committee selected 29 for publication in the wo- shop proceedings, resulting in an acceptance rate of 19.6%, the lowest in the history of CHES. The review process followed strict standards: each paper - ceived at least four reviews, and some asmanyaseightreviews.Membersofthe Program Committee were restricted to co-authoring at most two submissions, and their papers were evaluated by an extended number of reviewers. The ProgramCommittee included 53 members representing 20 countries and ?ve continents. These members were carefully selected to represent academia, industry, and government, as well as to include world-class experts in various research ?elds of interest to CHES. The Program Committee was supported by 148 external reviewers. The total number of people contributing to the - view process, including Program Committee members, external reviewers, and Program Co-chairs, exceeded 200. The papers collected in this volume represent cutting-edge worldwide - search in the rapidly growing and evolving area of cryptographic engineering.



Constructive Side Channel Analysis And Secure Design


Constructive Side Channel Analysis And Secure Design
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Author : Sylvain Guilley
language : en
Publisher: Springer
Release Date : 2017-08-02

Constructive Side Channel Analysis And Secure Design written by Sylvain Guilley and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2017-08-02 with Computers categories.


This book constitutes revised selected papers from the 8th International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2017, held in Paris, France, in April 2017. The 17 papers presented in this volume were carefully reviewed and selected from numerous submissions. They were organized in topical sections named: Side-Channel Attacks and Technological Effects; Side-Channel Countermeasures; Algorithmic Aspects in Side-Channel Attacks; Side-Channel Attacks; Fault Attacks; Embedded Security; and Side-Channel Tools.



Hardware Security


Hardware Security
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Author : Mark Tehranipoor
language : en
Publisher: Springer Nature
Release Date :

Hardware Security written by Mark Tehranipoor and has been published by Springer Nature this book supported file pdf, txt, epub, kindle and other format this book has been release on with categories.




Cryptographic Hardware And Embedded Systems Ches 2016


Cryptographic Hardware And Embedded Systems Ches 2016
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Author : Benedikt Gierlichs
language : en
Publisher: Springer
Release Date : 2016-08-03

Cryptographic Hardware And Embedded Systems Ches 2016 written by Benedikt Gierlichs and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2016-08-03 with Computers categories.


This book constitutes the proceedings of the 18th International Conference on Cryptographic Hardware and Embedded Systems, CHES 2016, held in Santa Barbara, CA, USA, in August 2016. The 30 full papers presented in this volume were carefully reviewed and selected from 148 submissions. They were organized in topical sections named: side channel analysis; automotive security; invasive attacks; side channel countermeasures; new directions; software implementations; cache attacks; physical unclonable functions; hardware implementations; and fault attacks.



Secure Smart Embedded Devices Platforms And Applications


Secure Smart Embedded Devices Platforms And Applications
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Author : Konstantinos Markantonakis
language : en
Publisher: Springer Science & Business Media
Release Date : 2013-09-14

Secure Smart Embedded Devices Platforms And Applications written by Konstantinos Markantonakis and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013-09-14 with Computers categories.


New generations of IT users are increasingly abstracted from the underlying devices and platforms that provide and safeguard their services. As a result they may have little awareness that they are critically dependent on the embedded security devices that are becoming pervasive in daily modern life. Secure Smart Embedded Devices, Platforms and Applications provides a broad overview of the many security and practical issues of embedded devices, tokens, and their operation systems, platforms and main applications. It also addresses a diverse range of industry/government initiatives and considerations, while focusing strongly on technical and practical security issues. The benefits and pitfalls of developing and deploying applications that rely on embedded systems and their security functionality are presented. A sufficient level of technical detail to support embedded systems is provided throughout the text, although the book is quite readable for those seeking awareness through an initial overview of the topics. This edited volume benefits from the contributions of industry and academic experts and helps provide a cross-discipline overview of the security and practical issues for embedded systems, tokens, and platforms. It is an ideal complement to the earlier work, Smart Cards Tokens, Security and Applications from the same editors.