Low Power Design Techniques For Analog To Digital Converters In Submicron Cmos
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Low Power Design Techniques For Analog To Digital Converters In Submicron Cmos
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Author : Tawfiq Musah
language : en
Publisher:
Release Date : 2011
Low Power Design Techniques For Analog To Digital Converters In Submicron Cmos written by Tawfiq Musah and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2011 with Analog-to-digital converters categories.
Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical in the development of portable electronic devices with small feature size and long battery life. However, the design of analog and mixed-signal building blocks, especially analog-to-digital converters (ADCs), becomes complex and power-inefficient with each advance in process node. This is because of decreased headroom and low intrinsic gain. In this thesis, circuit techniques that enable the design of low-complexity power-efficient ADCs in submicron CMOS are introduced. The techniques include improved correlated level shifting that allow the use of simple low gain amplifiers to realize high performance pipelined and delta-sigma ADCs. Also included is an investigation of the possibility of replacing the power-hungry amplifier in integrators, used in delta-sigma modulators, with low power zero-crossing-based ones. Simulation results of a correlated level shifting pipelined ADC and measurement results of a fabricated prototype of a zero-crossing-based delta-sigma ADC are employed to discuss the effectiveness of the techniques in achieving compact low-power designs.
Low Power High Resolution Analog To Digital Converters
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Author : Amir Zjajo
language : en
Publisher: Springer Science & Business Media
Release Date : 2010-10-29
Low Power High Resolution Analog To Digital Converters written by Amir Zjajo and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010-10-29 with Technology & Engineering categories.
With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
Design Techniques For Low Voltage And Low Power Analog To Digital Converters
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Author : Gil Cho Ahn
language : en
Publisher:
Release Date : 2005
Design Techniques For Low Voltage And Low Power Analog To Digital Converters written by Gil Cho Ahn and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2005 with Analog-to-digital converters categories.
With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply voltage to insure device reliability. Even though the largest amount of signal processing is done in the digital domain, the on-chip analog-to-digital interface circuitry (analog-to-digital and digital-to-analog converters) is an important functional block in the system. These converters are also required to operate with low-voltage supply. In this thesis, design techniques for low-voltage and low-power analog-to-digital converters are proposed. The specific research contributions of this work include (1) introduction of a new low-voltage switching technique for switched- capacitor circuit design, (2) development of low-voltage and low-distortion delta- sigma modulator, (3) development of low-voltage switched-capacitor multiplying digital-to-analog converter (MDAC), (4) a new architecture for the low-power Nyquist rate pipelined ADC design. These design techniques enable the implementation of low-voltage and low-power CMOS analog-to-digital converters. To demonstrate the proposed design techniques, a 0.6 V, 82 dB, 2-2 cascaded audio delta-sigma ADC, a 0.9 V, 10-bit, 20MS/s CMOS pipelined ADC and a 2.4 V, 12-bit, 10MS/s CMOS pipelined ADC were implemented in standard CMOS processes.
Modular Low Power High Speed Cmos Analog To Digital Converter Of Embedded Systems
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Author : Keh-La Lin
language : en
Publisher: Springer Science & Business Media
Release Date : 2006-01-14
Modular Low Power High Speed Cmos Analog To Digital Converter Of Embedded Systems written by Keh-La Lin and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2006-01-14 with Technology & Engineering categories.
One of the main trends of microelectronics is toward design for integrated systems, i.e., system-on-a-chip (SoC) or system-on-silicon (SoS). Due to this development, design techniques for mixed-signal circuits become more important than before. Among other devices, analog-to-digital and digital-to-analog converters are the two bridges between the analog and the digital worlds. Besides, low-power design technique is one of the main issues for embedded systems, especially for hand-held applications. Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter for Embedded Systems aims at design techniques for low-power, high-speed analog-to-digital converter processed by the standard CMOS technology. Additionally this book covers physical integration issues of A/D converter integrated in SoC, i.e., substrate crosstalk and reference voltage network design.
A Power Optimized Pipelined Analog To Digital Converter Design In Deep Sub Micron Cmos Technology
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Author : Chang-Hyuk Cho
language : en
Publisher:
Release Date : 2005
A Power Optimized Pipelined Analog To Digital Converter Design In Deep Sub Micron Cmos Technology written by Chang-Hyuk Cho and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2005 with Analog-to-digital converters categories.
High-speed, medium-resolution, analog-to-digital converters (ADCs) are important building blocks in a wide range of applications. High-speed, medium-resolution ADCs have been implemented by various ADC architectures such as a folding ADC, a subranging ADC, and a pipeline ADC. Among them, pipeline ADCs have proven to be efficient architectures for applications such as digital communication systems, data acquisition systems and video systems. Especially, power dissipation is a primary concern in applications requiring portability. Thus, the objective of this work is to design and build a low-voltage low-power medium-resolution (8-10bits) high-speed pipeline ADC in deep sub-micron CMOS technology. The non-idealities of the circuit realization are carefully investigated in order to identify the circuit requirements for a low power circuit design of a pipeline ADC. The resolution per stage plays an important role in determining overall power dissipation of a pipeline ADC. The pros and cons of both large and small number of bits per-stage are examined. A power optimization algorithm is developed to decide more accurately which approach is better for lower power dissipation. Both identical and non-identical number of bit per-stage approaches are considered and their differences are analyzed. A low-power, low-voltage 10-bit 100Msamples/s pipeline ADC was designed and implemented in a 0.18mm CMOS process. The power consumption was minimized with the right selection of the per-stage resolution based on the result of the power optimization algorithm and by the scaling down the sampling capacitor size in subsequent stages.
Circuit Techniques For Low Voltage Deep Submicron Cmos Analog To Digital Converters
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Author : Christian Jésus Bayodé Fayomi
language : en
Publisher:
Release Date : 2003
Circuit Techniques For Low Voltage Deep Submicron Cmos Analog To Digital Converters written by Christian Jésus Bayodé Fayomi and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2003 with categories.
High Resolution And High Speed Integrated Cmos Ad Converters For Low Power Applications
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Author : Weitao Li
language : en
Publisher: Springer
Release Date : 2017-08-01
High Resolution And High Speed Integrated Cmos Ad Converters For Low Power Applications written by Weitao Li and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2017-08-01 with Technology & Engineering categories.
This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
Design Of Low Voltage Analog To Digital Converter In Submicron Cmos
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Author : Simone Gambini
language : en
Publisher:
Release Date : 2006
Design Of Low Voltage Analog To Digital Converter In Submicron Cmos written by Simone Gambini and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2006 with categories.
Generalized Low Voltage Circuit Techniques For Very High Speed Time Interleaved Analog To Digital Converters
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Author : Sai-Weng Sin
language : en
Publisher: Springer Science & Business Media
Release Date : 2010-09-29
Generalized Low Voltage Circuit Techniques For Very High Speed Time Interleaved Analog To Digital Converters written by Sai-Weng Sin and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010-09-29 with Technology & Engineering categories.
Analog-to-Digital Converters (ADCs) play an important role in most modern signal processing and wireless communication systems where extensive signal manipulation is necessary to be performed by complicated digital signal processing (DSP) circuitry. This trend also creates the possibility of fabricating all functional blocks of a system in a single chip (System On Chip - SoC), with great reductions in cost, chip area and power consumption. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise performance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technology scaling, as well as the requirement of battery operated portable devices. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations.
Reference Free Cmos Pipeline Analog To Digital Converters
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Author : Michael Figueiredo
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-08-24
Reference Free Cmos Pipeline Analog To Digital Converters written by Michael Figueiredo and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-08-24 with Technology & Engineering categories.
This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.