Design For Manufacturability With Advanced Lithography
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Design For Manufacturability With Advanced Lithography
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Author : Bei Yu
language : en
Publisher: Springer
Release Date : 2015-10-28
Design For Manufacturability With Advanced Lithography written by Bei Yu and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2015-10-28 with Technology & Engineering categories.
This book introduces readers to the most advanced research results on Design for Manufacturability (DFM) with multiple patterning lithography (MPL) and electron beam lithography (EBL). The authors describe in detail a set of algorithms/methodologies to resolve issues in modern design for manufacturability problems with advanced lithography. Unlike books that discuss DFM from the product level or physical manufacturing level, this book describes DFM solutions from a circuit design level, such that most of the critical problems can be formulated and solved through combinatorial algorithms.
Design For Manufacturing With Advanced Lithography
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Author : Bei Yu
language : en
Publisher:
Release Date : 2014
Design For Manufacturing With Advanced Lithography written by Bei Yu and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014 with categories.
Shrinking the feature size of very large scale integrated circuits (VLSI) with advanced lithography has been a holy grail for the semiconductor industry. However, the gap between manufacturing capability and the expectation of design performance becomes critically challenged in sub-16nm technology nodes. To bridge this gap, design for manufacturing (DFM) is a must to co-optimize both design and lithography process at the same time. DFM for advanced lithography could be defined very differently under different circumstances. In general, progress in advanced lithography happens along three different directions: (1) New patterning technique (e.g., layout decomposition for different patterning techniques); (2) New design methodology (e.g., lithography aware standard cell design and physical design); (3) New illumination system (e.g., layout fracturing for EBL system, stencil planning for EBL system). In this dissertation, we present our research results on design for manufacturing (DFM) with multiple patterning lithography (MPL) and electron beam lithography (EBL) addressing these three DFM research directions in advanced lithography. For the research direction of new patterning technique, we study the layout decomposition problems for different patterning technique and explore four important topics: (1) layout decomposition for triple patterning; (2) density balanced layout decomposition for triple patterning; (3) layout decomposition for triple patterning with end-cutting; (4) layout decomposition for quadruple patterning and beyond. We present the proof that triple patterning layout decomposition is NP-hard. Besides, we propose a number of CAD optimization and integration techniques to solve different problems. For the research direction of new design methodology, we will show the limitation of traditional design flow. That is, ignoring triple patterning lithography (TPL) in early stages may limit the potential to resolve all the TPL conflicts. We propose a coherent framework, including standard cell compliance and detailed placement, to enable TPL friendly design. Considering TPL constraints during early design stages, such as standard cell compliance, improves the layout decomposability. With the pre-coloring solutions of standard cells, we present a TPL aware detailed placement where the layout decomposition and placement can be resolved simultaneously. In addition, we propose a linear dynamic programming to solve TPL aware detailed placement with maximum displacement, which can achieve good trade-off in terms of runtime and performance. For the EBL illumination system, we focus on two topics to improve the throughput of the whole EBL system: (1) overlapping aware stencil planning under MCC system; (2) L-shape based layout fracturing for mask preparation. With simulations and experiments, we demonstrate the critical role and effectiveness of DFM techniques for the advanced lithography, as the semiconductor industry marches forward in the deeper sub-micron domain.
Design For Manufacturability
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Author : Artur Balasinski
language : en
Publisher: Springer Science & Business Media
Release Date : 2013-10-05
Design For Manufacturability written by Artur Balasinski and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013-10-05 with Technology & Engineering categories.
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.
Lithography Driven Design For Manufacturing In Nanometer Era Vlsi
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Author : Chul-Hong Park
language : en
Publisher:
Release Date : 2008
Lithography Driven Design For Manufacturing In Nanometer Era Vlsi written by Chul-Hong Park and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2008 with categories.
Photolithography has been a key enabler of the aggressive IC technology scaling implicit in Moore's Law. As minimum feature sizes approach the physical limits of lithography and the manufacturing process, resolution enhancement techniques (RETs) dictate certain tradeoffs with various aspects of process and performance. This in turn has led to unpredictable design, unpredictable manufacturing, and low yield. As a result, close communication between designer and manufacturer has become essential to overcome the uncertainties of design and manufacturing. The design for manufacturability (DFM) paradigm has emerged recently to improve communications at the design-manufacturing interface and to reduce manufacturing variability. DFM is a set of technologies and methodologies that both help the designer extract maximum value from silicon process technology and solve "unsolvable" manufacturing challenges. Traditional DFM techniques, which include design rule check (DRC) and optical proximity correction (OPC), have been successfully used until now. However, as the extent and complexity of lithography variations increase, traditional techniques are no longer adequate to accommodate the various lithography demands. This thesis focuses on ways to mitigate the impact of lithography variations on design by establishing new interfaces between design and manufacturing. The motivations for doing so are improved printability, timing and leakage as well as reduced design cost. To improve printability, we propose a detailed placement perturbation technique for improved depth of focus and process window. Using a dynamic programming (DP)-based method for the perturbation, the technique facilitates insertion of scattering bars and etch dummy features, reducing inter-cell forbidden pitches almost completely. We also propose a novel auxiliary pattern-enabled cell-based OPC which can improve the edge placement error over cell-based OPC. The technique improves runtime which has grown unacceptably in model-based OPC, while retaining its runtime advantage as well as timing and leakage optimization. The detailed placement framework is also available to allow opportunistic insertion of auxiliary pattern around cell instances in the design layout. Aberration leads to linewidth variation which is fundamental to achieve timing performance and manufacturing yield. We describe an aberration-aware timing analysis flow that accounts for aberration-induced cell delay variations. We then propose an aberration-aware timing-driven global placement technique which utilizes the predictable slow and fast regions created on the chip due to aberration to improve cycle time. The use of the technique along with field blading achieves significant cycle time improvement. DoseMapper technique adopted in advanced lithography equipments has been used to reduce the across-chip linewidth variation. We propose a novel method to enhance timing yield as well as reduce leakage power by combined dose map and placement optimizations. The new dose map is not determined to have the same critical dimension (CD) in all transistor gates, but optimized to have different linewidths. That is, for devices on setup timing-critical paths, a smaller than nominal CD will be desirable, since this creates a faster-switching transistor. On the other hand, for devices on hold timing-critical paths, a larger than nominal gate CD will be desirable since this creates a less leaky transistor. Last, the golden verification signoff tool using simulation-based approach represents a runtime-quality tradeoff that is high in quality, but also high in runtime. We are motivated to develop a low-runtime pre-filter that reduces the amount of layout area to be analyzed by the golden tool, without compromising the overall quality finding hotspots. We demonstrate a dual graph-based hotspot filtering technique that enables fast and accurate estimation.
Physical Design And Mask Synthesis For Directed Self Assembly Lithography
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Author : Seongbo Shim
language : en
Publisher: Springer
Release Date : 2018-03-21
Physical Design And Mask Synthesis For Directed Self Assembly Lithography written by Seongbo Shim and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2018-03-21 with Technology & Engineering categories.
This book discusses physical design and mask synthesis of directed self-assembly lithography (DSAL). It covers the basic background of DSAL technology, physical design optimizations such as placement and redundant via insertion, and DSAL mask synthesis as well as its verification. Directed self-assembly lithography (DSAL) is a highly promising patterning solution in sub-7nm technology.
Design For Manufacturability And Yield For Nano Scale Cmos
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Author : Charles Chiang
language : en
Publisher: Springer Science & Business Media
Release Date : 2007-06-15
Design For Manufacturability And Yield For Nano Scale Cmos written by Charles Chiang and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2007-06-15 with Technology & Engineering categories.
This book walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process. It covers all CAD/CAE aspects of a SOC design flow and addresses a new topic (DFM/DFY) critical at 90 nm and beyond. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
Analog Design For Manufacturability
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Author : Xuan Dong
language : en
Publisher:
Release Date : 2017
Analog Design For Manufacturability written by Xuan Dong and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2017 with categories.
As transistor sizes shrink over time in the advanced nanometer technologies, lithography effects have become a dominant contributor of integrated circuit (IC) yield degradation. Random manufacturing variations, such as photolithographic defect or spot defect, may cause fatal functional failures, while systematic process variations, such as dose fluctuation and defocus, can result in wafer pattern distortions and in turn ruin circuit performance. This dissertation is focused on yield optimization at the circuit design stage or so-called design for manufacturability (DFM) with respect to analog ICs, which has not yet been sufficiently addressed by traditional DFM solutions. On top of a graph-based analog layout retargeting framework, in this dissertation the photolithographic defects and lithography process variations are alleviated by geometrical layout manipulation operations including wire widening, wire shifting, process variation band (PV-band) shifting, and optical proximity correction (OPC). The ultimate objective of this research is to develop efficient algorithms and methodologies in order to achieve lithography-robust analog IC layout design without circuit performance degradation.
Lithography Aware Physical Design And Layout Optimization For Manufacturability
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Author : Jhih-Rong Gao
language : en
Publisher:
Release Date : 2014
Lithography Aware Physical Design And Layout Optimization For Manufacturability written by Jhih-Rong Gao and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014 with categories.
As technology continues to scale down, semiconductor manufacturing with 193nm lithography is greatly challenging because the required half pitch size is beyond the resolution limit. In order to bridge the gap between design requirements and manufacturing limitations, various resolution enhancement techniques have been proposed to avoid potentially problematic patterns and to improve product yield. In addition, co-optimization between design performance and manufacturability can further provide flexible and significant yield improvement, and it has become necessary for advanced technology nodes. This dissertation presents the methodologies to consider the lithography impact in different design stages to improve layout manufacturability. Double Patterning Lithography (DPL) has been a promising solution for sub-22nm node volume production. Among DPL techniques, self-aligned double patterning (SADP) provides good overlay controllability when two masks are not aligned perfectly. However, SADP process places several limitations on design flexibility and still exists many challenges in physical design stages. Starting from the early design stage, we analyze the standard cell designs and construct a set of SADP-aware cell placement candidates, and show that placement legalization based on this SADP awareness information can effectively resolve DPL conflicts. In the detailed routing stage, we propose a new routing cost formulation based on SADP-compliant routing guidelines, and achieve routing and layout decomposition simultaneously. In the case that limited routing perturbation is allowed, we propose a post-routing flow based on lithography simulation and lithography-aware design rules. Both routing methods, one in detailed routing stage and one in post routing stage, reduce DPL conflicts/violations significantly with negligible wire length impact. In the layout decomposition stage, layout modification is restricted and thus the manufacturability is even harder to guaranteed. By taking the advantage of complementary lithography, we present a new layout decomposition approach with e-beam cutting, which optimizes SADP overlay error and e-beam lithography throughput simultaneously. After the mask layout is defined, optical proximity correction (OPC) is one of the resolution enhancement techniques that is commonly required to compensate the image distortion from the lithography process. We propose an inverse lithography technique to solve the OPC problem considering design target and process window co-optimization. Our mask optimization is pixel based and thus can enable better contour fidelity. In the final physical verification stage, a complex and time-consuming lithography simulation needs to be performed to identify faulty patterns. We provide a classification method based on support vector machine and principle component analysis that detects lithographic hotspots efficiently and accurately.
Design For Manufacturability Concurrent Engineering
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Author : David M. Anderson
language : en
Publisher:
Release Date : 2003
Design For Manufacturability Concurrent Engineering written by David M. Anderson and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2003 with Concurrent engineering categories.
Design For Manufacturability And Statistical Design
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Author : Michael Orshansky
language : en
Publisher: Springer Science & Business Media
Release Date : 2007-10-28
Design For Manufacturability And Statistical Design written by Michael Orshansky and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2007-10-28 with Technology & Engineering categories.
Design for Manufacturability and Statistical Design: A Comprehensive Approach presents a comprehensive overview of methods that need to be mastered in understanding state-of-the-art design for manufacturability and statistical design methodologies. Broadly, design for manufacturability is a set of techniques that attempt to fix the systematic sources of variability, such as those due to photolithography and CMP. Statistical design, on the other hand, deals with the random sources of variability. Both paradigms operate within a common framework, and their joint comprehensive treatment is one of the objectives of this book and an important differentation.