Design Of High Performance And Low Power Successive Approximation Register Sar Analog To Digital Converter
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Design Of High Performance And Low Power Successive Approximation Register Sar Analog To Digital Converter
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Author : 蔡任桓
language : en
Publisher:
Release Date : 2014
Design Of High Performance And Low Power Successive Approximation Register Sar Analog To Digital Converter written by 蔡任桓 and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2014 with categories.
Low Power Techniques For Successive Approximation Register Sar Analog To Digital Converters
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Author : Ramgopal Sekar
language : en
Publisher:
Release Date : 2010
Low Power Techniques For Successive Approximation Register Sar Analog To Digital Converters written by Ramgopal Sekar and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010 with categories.
In this work, the author investigated circuit techniques to reduce the power consumption of Successive Approximation Register Analog-to-Digital Converter (SAR-ADC). The author developed four low-power SAR-ADC design techniques, which are: (1) Low-power SAR-ADC design with split voltage reference, (2) Charge recycling techniques for low-power SAR-ADC design, (3) Low-power SAR-ADC design using two-capacitor arrays, (4) Power reduction techniques by dynamically minimizing SAR-ADC conversion cycles. Matlab simulations are performed to investigate the power saving by the proposed techniques. Simulation results show that significant power reduction can be achieved by using the developed techniques. In addition, design issues such as area overhead, design complexity associated with the proposed low-power techniques are also discussed in the thesis.
Data Conversion Handbook
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Author : Walt Kester
language : en
Publisher: Newnes
Release Date : 2005
Data Conversion Handbook written by Walt Kester and has been published by Newnes this book supported file pdf, txt, epub, kindle and other format this book has been release on 2005 with Computers categories.
This complete update of a classic handbook originally created by Analog Devices and never previously published offers the most complete and up-to-date reference available on data conversion, from the world authority on the subject. It describes in depth the theory behind and the practical design of data conversion circuits. It describes the different architectures used in A/D and D/A converters - including many advances that have been made in this technology in recent years - and provides guidelines on which types are best suited for particular applications. It covers error characterization and testing specifications, essential design information that is difficult to find elsewhere. The book also contains a wealth of practical application circuits for interfacing and supporting A/D and D/A converters within an electronic system. In short, everything an electronics engineer needs to know about data converters can be found in this volume, making it an indispensable reference with broad appeal. The accompanying CD-ROM provides software tools for testing and analyzing data converters as well as a searchable pdf version of the text. * brings together a huge amount of information impossible to locate elsewhere. * many recent advances in converter technology simply aren't covered in any other book. * a must-have design reference for any electronics design engineer or technician
Low Power High Performance Sar Adc With Redundancy And Digital Background Calibration
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Author : Albert Hsu Ting Chang
language : en
Publisher:
Release Date : 2013
Low Power High Performance Sar Adc With Redundancy And Digital Background Calibration written by Albert Hsu Ting Chang and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013 with categories.
As technology scales, the improved speed and energy eciency make the successive- approximation-register (SAR) architecture an attractive alternative for applications that require high-speed and high-accuracy analog-to-digital converters (ADCs). In SAR ADCs, the key linearity and speed limiting factors are capacitor mismatch and incomplete digital-to-analog converter (DAC)/reference voltage settling. In this the- sis, a sub-radix-2 SAR ADC is presented with several new contributions. The main contributions include investigation of using digital error correction (redundancy) in SAR ADCs for dynamic error correction and speed improvement, development of two new calibration algorithms to digitally correct for manufacturing mismatches, design of new architecture to incorporate redundancy within the architecture itself while achieving 94% better energy eciency compared to conventional switching algorithm, development of a new capacitor DAC structure to improve the SNR by four times with improved matching, joint design of the analog and digital circuits to create an asynchronous platform in order to reach the targeted performance, and analysis of key circuit blocks to enable the design to meet noise, power and timing requirements. The design is fabricated in standard 1P9M 65nm CMOS technology with 1.2V supply. The active die area is 0.083mm2 with full rail-to-rail input swing of 2.4V p-p . A 67.4dB SNDR, 78.1dB SFDR, +1.0/-0.9 LSB12 INL and +0.5/-0.7 LSB12 DNL are achieved at 50MS/s at Nyquist rate. The total power consumption, including the estimated calibration and reference power, is 2.1mW, corresponding to 21.9fJ/conv.- step FoM. This ADC achieves the best FoM of any ADCs with greater than 10b ENOB and 10MS/s sampling rate.
Time Interleaved Analog To Digital Converters
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Author : Simon Louwsma
language : en
Publisher: Springer Science & Business Media
Release Date : 2010-09-08
Time Interleaved Analog To Digital Converters written by Simon Louwsma and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010-09-08 with Technology & Engineering categories.
Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.
Accelerated Successive Approximation Technique For Analog To Digital Converter Design
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Author : Ram Harshvardhan Radhakrishnan
language : en
Publisher:
Release Date : 2015
Accelerated Successive Approximation Technique For Analog To Digital Converter Design written by Ram Harshvardhan Radhakrishnan and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2015 with Analog-to-digital converters categories.
This thesis work presents a novel technique to reduce the number of conversion cycles for Successive Approximation register (SAR) Analog to Digital Converters (ADC), thereby potentially improving the conversion speed as well as reducing its power consumption. Conventional SAR ADCs employ the binary search algorithm and they update only one bound, either the upper or lower bound, of the search space during one conversion cycle. The proposed method, referred to as the Accelerated-SAR or A-SAR, is capable of updating both the lower and upper bounds in a single conversion cycle. Even in cases that it can update only one bound, it does more aggressively. The proposed technique is implemented in a 10-bit SAR ADC circuit with 0.5V power supply and rail-to-rail input range. To cope with the ultra-low voltage design challenge, Time-to-Digital conversion techniques are used in the implementation. Important design issues are also discussed for the charge scaling array and Voltage Controlled Delay Lines (VCDL), which are important building blocks in the ADC implementation.
Advances In Analog And Rf Ic Design For Wireless Communication Systems
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Author : Kostas Doris
language : en
Publisher: Elsevier Inc. Chapters
Release Date : 2013-05-13
Advances In Analog And Rf Ic Design For Wireless Communication Systems written by Kostas Doris and has been published by Elsevier Inc. Chapters this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013-05-13 with Technology & Engineering categories.
This paper reviews recent developments of interleaved Successive Approximation Analog-to-Digital converters (SAR) in deep sub-micron CMOS technologies. The discussion covers design tradeoffs and degrees of freedom related to the impact of extensive interleaving with many SAR units on bandwidth, noise, linearity, and spurious performance. The impact of interleaving mismatches on representative broadband and multi-carrier narrowband signals is also discussed. Next, two examples are given demonstrating how interleaving with many ADCs can be transformed from a weakness to a strength. The first example concerns low spurious performance enabled by redundant SAR converters and randomization of their operation. The second example presents spectral sensing techniques.
Low Power High Resolution Analog To Digital Converters
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Author : Amir Zjajo
language : en
Publisher: Springer Science & Business Media
Release Date : 2010-10-29
Low Power High Resolution Analog To Digital Converters written by Amir Zjajo and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010-10-29 with Technology & Engineering categories.
With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
Design Of Low Power Successive Approximation Register Analog To Digital Converter
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Author : Shu-I. Hu
language : en
Publisher:
Release Date : 2013
Design Of Low Power Successive Approximation Register Analog To Digital Converter written by Shu-I. Hu and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013 with categories.
Analog Digital Converters For Industrial Applications Including An Introduction To Digital Analog Converters
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Author : Frank Ohnhäuser
language : en
Publisher: Springer
Release Date : 2015-07-01
Analog Digital Converters For Industrial Applications Including An Introduction To Digital Analog Converters written by Frank Ohnhäuser and has been published by Springer this book supported file pdf, txt, epub, kindle and other format this book has been release on 2015-07-01 with Technology & Engineering categories.
This book offers students and those new to the topic of analog-to-digital converters (ADCs) a broad introduction, before going into details of the state-of-the-art design techniques for SAR and DS converters, including the latest research topics, which are valuable for IC design engineers as well as users of ADCs in applications. The book then addresses important topics, such as correct connectivity of ADCs in an application, the verification, characterization and testing of ADCs that ensure high-quality end products. Analog-to-digital converters are the central element in any data processing system and regulation loops such as modems or electrical motor drives. They significantly affect the performance and resolution of a system or end product. System development engineers need to be familiar with the performance parameters of the converters and understand the advantages and disadvantages of the various architectures. Integrated circuit development engineers have to overcome the problem of achieving high performance and resolution with the lowest possible power dissipation, while the digital circuitry generates distortion in supply, ground and substrate. This book explains the connections and gives suggestions for obtaining the highest possible resolution. Novel trends are illustrated in the design of analog-to-digital converters based on successive approximation and the difficulties in the development of continuous-time delta-sigma modulators are also discussed.