Switch Level Timing Simulation Of Mos Vlsi Circuits
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Switch Level Timing Simulation Of Mos Vlsi Circuits
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Author : Vasant B. Rao
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-12-06
Switch Level Timing Simulation Of Mos Vlsi Circuits written by Vasant B. Rao and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-12-06 with Technology & Engineering categories.
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.
Switch Level Timing Simulation Of Mos Vlsi Circuits
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Author : Vasant Bangalore Rao
language : en
Publisher:
Release Date : 1985
Switch Level Timing Simulation Of Mos Vlsi Circuits written by Vasant Bangalore Rao and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1985 with categories.
This report deals with the development of a fast and accurate simulation tool for very-large-scale integrated (VLSI) circuits consisting of metal-oxide-semiconductor (MOS) transistors. Such tools are called switch-level timing simulators and they provide adequate information on the performance of the circuits with a reasonable expenditure of computation time even for very large circuits. The algorithms presented in this thesis can handle only n-channel MOS(NMOS) circuits, but are easily extendible to handle complementary MOS(CMOS) circuits as well. The algorithms presented in this report have been implemented in a computer program called MOSTIM. In all the circuits simulated thus far, MOSTIM provides timing information with an accuracy of within 10% of that provided by SPICE2, at approximately two orders of magnitude faster in simulation speed. (Author).
Switch Level Timing Simulation Of Mos Vlsi Metal Oxide Semiconductor Very Large Scale Integrated Circuits
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Author : Vasant B. Rao
language : en
Publisher:
Release Date : 1985
Switch Level Timing Simulation Of Mos Vlsi Metal Oxide Semiconductor Very Large Scale Integrated Circuits written by Vasant B. Rao and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1985 with categories.
This report deals with the development of a fast and accurate simulation tool for very-large-scale integrated (VLSI) circuits consisting of metal-oxide-semiconductor (MOS) transistors. Such tools are called switch-level timing simulators and they provide adequate information on the performance of the circuits with a reasonable expenditure of computation time even for very large circuits. The algorithms presented in this thesis can handle only n-channel MOS(NMOS) circuits, but are easily extendible to handle complementary MOS(CMOS) circuits as well. The algorithms presented in this report have been implemented in a computer program called MOSTIM. In all the circuits simulated thus far, MOSTIM provides timing information with an accuracy of within 10% of that provided by SPICE2, at approximately two orders of magnitude faster in simulation speed. (Author).
A New Approach To Switch Level Timing Simulation Of Cmos Vlsi Circuits
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Author : David Vincent Overhauser
language : en
Publisher:
Release Date : 1985
A New Approach To Switch Level Timing Simulation Of Cmos Vlsi Circuits written by David Vincent Overhauser and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1985 with categories.
Digital Timing Macromodeling For Vlsi Design Verification
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Author : Jeong-Taek Kong
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-12-06
Digital Timing Macromodeling For Vlsi Design Verification written by Jeong-Taek Kong and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-12-06 with Technology & Engineering categories.
Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timing, switch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels. The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.
Switch Level Fault Simulation Of Mos Vlsi Circuits
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Author : Evstratios Vandris
language : en
Publisher:
Release Date : 1991
Switch Level Fault Simulation Of Mos Vlsi Circuits written by Evstratios Vandris and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1991 with categories.
Symbolic Switch Level Logic And Fault Simulation Of Mos Vlsi Circuit
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Author : Daniel Georges Saab
language : en
Publisher:
Release Date : 1985
Symbolic Switch Level Logic And Fault Simulation Of Mos Vlsi Circuit written by Daniel Georges Saab and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1985 with categories.
Analog Design Issues In Digital Vlsi Circuits And Systems
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Author : Juan J. Becerra
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-12-06
Analog Design Issues In Digital Vlsi Circuits And Systems written by Juan J. Becerra and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-12-06 with Technology & Engineering categories.
Analog Design Issues in Digital VLSI Circuits and Systems brings together in one place important contributions and up-to-date research results in this fast moving area. Analog Design Issues in Digital VLSI Circuits and Systems serves as an excellent reference, providing insight into some of the most challenging research issues in the field.
Electrothermal Analysis Of Vlsi Systems
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Author : Yi-Kan Cheng
language : en
Publisher: Springer Science & Business Media
Release Date : 2005-12-01
Electrothermal Analysis Of Vlsi Systems written by Yi-Kan Cheng and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2005-12-01 with Technology & Engineering categories.
This useful book addresses electrothermal problems in modern VLSI systems. It discusses electrothermal phenomena and the fundamental building blocks that electrothermal simulation requires. The authors present three important applications of VLSI electrothermal analysis: temperature-dependent electromigration diagnosis, cell-level thermal placement, and temperature-driven power and timing analysis.
Hot Carrier Reliability Of Mos Vlsi Circuits
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Author : Yusuf Leblebici
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-12-06
Hot Carrier Reliability Of Mos Vlsi Circuits written by Yusuf Leblebici and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-12-06 with Technology & Engineering categories.
As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis and the basic understanding of the physical failure mechanisms observed in integrated circuits. Hot-carrier induced degrada tion of MOS transistor characteristics is one of the primary mechanisms affecting the long-term reliability of MOS VLSI circuits. It is likely to become even more important in future generation chips, since the down ward scaling of transistor dimensions without proportional scaling of the operating voltage aggravates this problem. A thorough understanding of the physical mechanisms leading to hot-carrier related degradation of MOS transistors is a prerequisite for accurate circuit reliability evaluation. It is also being recognized that important reliability concerns other than the post-manufacture reliability qualification need to be addressed rigorously early in the design phase. The development and use of accurate reliability simulation tools are therefore crucial for early assessment and improvement of circuit reliability : Once the long-term reliability of the circuit is estimated through simulation, the results can be compared with predetermined reliability specifications or limits. If the predicted reliability does not satisfy the requirements, appropriate design modifications may be carried out to improve the resistance of the devices to degradation.