Digital Background Calibration Of Analog To Digital Converters Using A Calibration Queue
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Digital Background Calibration Of Analog To Digital Converters Using A Calibration Queue
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Author : Ozan Ersan Erdoğan
language : en
Publisher:
Release Date : 1999
Digital Background Calibration Of Analog To Digital Converters Using A Calibration Queue written by Ozan Ersan Erdoğan and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1999 with categories.
A Calibration Service For Analog To Digital And Digital To Analog Converters
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Author : T. Michael Souders
language : en
Publisher:
Release Date : 1981
A Calibration Service For Analog To Digital And Digital To Analog Converters written by T. Michael Souders and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1981 with Analog-to-digital converters categories.
Analog Background Calibration Of Parallel Pipelined Analog To Digital Converters
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Author : Kenneth Colin Dyer
language : en
Publisher:
Release Date : 1998
Analog Background Calibration Of Parallel Pipelined Analog To Digital Converters written by Kenneth Colin Dyer and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1998 with Analog-to-digital converters categories.
Nested Digital Background Calibration Of Pipelined Analog To Digital Converters
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Author : Xiaoyue Wang
language : en
Publisher:
Release Date : 2003
Nested Digital Background Calibration Of Pipelined Analog To Digital Converters written by Xiaoyue Wang and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2003 with categories.
Background Calibration Of Time Interleaved Data Converters
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Author : Manar El-Chammas
language : en
Publisher: Springer Science & Business Media
Release Date : 2011-12-17
Background Calibration Of Time Interleaved Data Converters written by Manar El-Chammas and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2011-12-17 with Technology & Engineering categories.
This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture.
Digital Calibration Algorithms For Nyquist Rate Analog To Digital Converters
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Author : Anup Savla
language : en
Publisher:
Release Date : 2004
Digital Calibration Algorithms For Nyquist Rate Analog To Digital Converters written by Anup Savla and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2004 with Analog-to-digital converters categories.
Abstract: Continuous scaling down of CMOS device sizes and an accompanied increase in device switching speeds prompts the design of mixed-signal systems with increasingly complex digital signal processing and control algorithms accompanied by simpler analog circuitry. Analog to digital converter (ADC) is an essential mixed-signal component of modern receivers, where signals sensed from the source are converted to digital for further signal processing on them. In this dissertation, calibration techniques are presented which allow ADCs to be designed with large inherent gain and offset errors. The concept of arbitrary radix multistep conversion is presented, along with algorithms that enable reduced radix conversion with digital correction in pipelined or algorithmic ADCs. Calibration techniques that account for linear and nonlinear gain error are presented and adapted to the popular 1.5 bit/stage pipeline architecture. Calibration is performed purely with digital post-processing on ADC output bits, with no changes occurring in the analog hardware. In this dissertation a WCDMA/WLAN receiver architecture is presented and specifications are derived for all its components. Concept of reconfigurable ADC design is presented, which allows speed and power consumption optimization. Reduced radix digital correction, linear and nonlinear calibration and background-calibrating queues are presented and combined in two behavioral models. The reconfigurable ADC was fabricated in AMI0.5u 3V CMOS process, and achieved 55dB dynamic range at 45MS/s, consuming 51mW power. The reconfigured calibrated ADC was simulated in TSMC 0.18u 1.8V CMOS process, and achieved 63dB dynamic range at 25MS/s, consuming 3.6mW power. Measurements of the capture card showed a 1.6bit improvement in resolution with the use of calibration algorithms.
Digital Background Calibration Of Time Interleaved Analog To Digital Converters
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Author : Shafiq M. Jamal
language : en
Publisher:
Release Date : 2001
Digital Background Calibration Of Time Interleaved Analog To Digital Converters written by Shafiq M. Jamal and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2001 with Analog-to-digital converters categories.
Nested Digital Background Calibration Of A 12 Bit Pipelined Adc Without An Input Sha
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Author : Haoyue Wang
language : en
Publisher:
Release Date : 2008
Nested Digital Background Calibration Of A 12 Bit Pipelined Adc Without An Input Sha written by Haoyue Wang and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2008 with categories.
Background Calibration Of Timing Skew In Time Interleaved A D Converters
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Author : Manar Ibrahim El-Chammas
language : en
Publisher: Stanford University
Release Date : 2010
Background Calibration Of Timing Skew In Time Interleaved A D Converters written by Manar Ibrahim El-Chammas and has been published by Stanford University this book supported file pdf, txt, epub, kindle and other format this book has been release on 2010 with categories.
The increasing data rate of wireline communication systems leads to more inter-symbol interference, due to the dispersive properties of the communication channel. This requires more complex equalization blocks to meet the required bit-error rate. One solution is to use an Analog-to-Digital Converter (ADC) in the front-end, thus enabling a digitally-equalized serial link. To achieve the high-data rates of these communication systems, a time-interleaved ADC is typically used. However, this type of ADC suffers from several time-varying errors, the most prominent of which is timing skew. This thesis introduces a statistics-based background calibration algorithm that compensates for the effect of timing skew. To demonstrate the background calibration algorithm, a proof-of-concept 5 bit 12 GS/s flash ADC has been fabricated in a 65 nm CMOS process. The design of this ADC takes into consideration the tight power bounds imposed on serial links by optimizing both the time-interleaved and the sub-ADC architecture. Power consumption is further reduced by using calibration circuits to correct the offset of the flash ADC's comparators. In the measured results, the timing skew correction improves the dynamic performance of the time-interleaved ADC by 12 dB, and the proof-of-concept ADC has the lowest published power consumption for ADCs with sample rates higher than 10 GS/s.
On Chip Digital Background Calibration Of Pipelined Analog To Digital Converters Using Digital Assistance To Support Nonlinear Residue Amplification
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Author : Thomas Liechti
language : en
Publisher:
Release Date : 2012
On Chip Digital Background Calibration Of Pipelined Analog To Digital Converters Using Digital Assistance To Support Nonlinear Residue Amplification written by Thomas Liechti and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012 with categories.