Testing Sequential Circuits
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Efficiency Of Compact Testing For Sequential Circuits
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Author : Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory
language : en
Publisher:
Release Date : 1976
Efficiency Of Compact Testing For Sequential Circuits written by Stanford University Stanford Electronics Laboratories. Digital Systems Laboratory and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1976 with categories.
Compact testing uses random inputs to test digital circuits. Detection is achieved by comparison between some statistic property of the circuit under test, like the frequency of ones on the output line, and the same property for the fault-free circuit. This paper shows that compact testing can be used efficiently for sequential machines, although it has some inherent limitations. Synchronization is achieved by a long sequence of random inputs whose length is circuit dependent. However, for most sequential circuits, synchronization can be achieved in a few seconds. The great majority of failures inside the memory elements are easily detected even with short tests. Compact testing also detects most of the failures in the combinational parts. There, its efficiency is largely dependent upon the test length and also the characteristics of the random number generators. However, even the most subtle failures may be detected if the test has sufficient length. Some of the requirements and trade-offs to achieve efficient detection are presented.
Testing Sequential Circuits
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Author : Dhananjay S. Brahme
language : en
Publisher:
Release Date : 1986*
Testing Sequential Circuits written by Dhananjay S. Brahme and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1986* with Expert systems (Computer science) categories.
An Introduction To Logic Circuit Testing
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Author : Parag K. Lala
language : en
Publisher: Morgan & Claypool Publishers
Release Date : 2009
An Introduction To Logic Circuit Testing written by Parag K. Lala and has been published by Morgan & Claypool Publishers this book supported file pdf, txt, epub, kindle and other format this book has been release on 2009 with Computers categories.
An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References
Combinational Test Generation For Sequential Circuits
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Author : Yong Chang Kim
language : en
Publisher:
Release Date : 2002
Combinational Test Generation For Sequential Circuits written by Yong Chang Kim and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2002 with categories.
A Method To Analyze Random Testing Of Sequential Circuits
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Author : Pascale Thevenod
language : en
Publisher:
Release Date : 1978
A Method To Analyze Random Testing Of Sequential Circuits written by Pascale Thevenod and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1978 with categories.
A New Approach For Random Testing Of Sequential Circuits
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Author : Robert W. Reuse
language : en
Publisher:
Release Date : 1997
A New Approach For Random Testing Of Sequential Circuits written by Robert W. Reuse and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1997 with categories.
Random Testing Of Digital Circuits
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Author : Rene David
language : en
Publisher: CRC Press
Release Date : 2020-11-26
Random Testing Of Digital Circuits written by Rene David and has been published by CRC Press this book supported file pdf, txt, epub, kindle and other format this book has been release on 2020-11-26 with Technology & Engineering categories.
"Introduces a theory of random testing in digital circuits for the first time and offers practical guidance for the implementation of random pattern generators, signature analyzers design for random testability, and testing results. Contains several new and unpublished results. "
Sequential Logic Testing And Verification
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Author : Abhijit Ghosh
language : en
Publisher: Springer Science & Business Media
Release Date : 2012-12-06
Sequential Logic Testing And Verification written by Abhijit Ghosh and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2012-12-06 with Technology & Engineering categories.
In order to design and build computers that achieve and sustain high performance, it is essential that reliability issues be considered care fully. The problem has several aspects. Certainly, considering reliability implies that an engineer must be able to analyze how design decisions affect the incidence of failure. For instance, in order design reliable inte gritted circuits, it is necessary to analyze how decisions regarding design rules affect the yield, i.e., the percentage of functional chips obtained by the manufacturing process. Of equal importance in producing reliable computers is the detection of failures in its Very Large Scale Integrated (VLSI) circuit components, caused by errors in the design specification, implementation, or manufacturing processes. Design verification involves the checking of the specification of a design for correctness prior to carrying out an implementation. Implementation verification ensures that the manual design or automatic synthesis process is correct, i.e., the mask-level description correctly implements the specification. Manufacture test involves the checking of the complex fabrication process for correctness, i.e., ensuring that there are no manufacturing defects in the integrated circuit. It should be noted that all the above verification mechanisms deal not only with verifying the functionality of the integrated circuit but also its performance.
Automatic Test Pattern Generator For Full Scan Sequential Circuits Using Limited Scan Operations
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Author : Vinod Pagalone
language : en
Publisher:
Release Date : 2006
Automatic Test Pattern Generator For Full Scan Sequential Circuits Using Limited Scan Operations written by Vinod Pagalone and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2006 with categories.
In testing sequential circuits with scan chains, the test application time is the main factor that determines the overall cost of testing the circuit. For these circuits, the test application time principally depends on the number flip-flops as well as the number of vectors in the test set. Though test set compaction is one way of reducing test application time, for a significant reduction in testing costs the duration of scan operation has to be reduced. The proposed method achieves this by using limited scan operations where the number of shifts is smaller that the actual length of the scan chain. Thus the compacted test set consists of limited scan operations in places where the scan operation cannot be dropped completely. The method uses an iterative procedure that identifies the vectors that have high fault coverage with minimal shifts in the scan chain.
Black Box Testing Techniques For Sequential Circuits
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Author : Ruyi Fan
language : en
Publisher:
Release Date : 2000
Black Box Testing Techniques For Sequential Circuits written by Ruyi Fan and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2000 with Integrated circuits categories.